Single-layer atom chip for continuous operation: Design, fabrication and performance

Highlights

• The most important approach for atomic interferometry is the atom chip technology.

• Atom chip integrates elements for cooling, trapping and atom manipulation.

• Single-layer atom chip is simplified the operation with the atomic ensemble.

• Increased heat dissipation from the chip is essential for continuous operation.

• Material, geometry and heat sink optimization gives the appropriate temperature.

• Continuous cooling of atoms near the chip is a key for future atom optics elements.

Abstract

A single-layer atom chip for laser cooling and trapping of atoms which operates in a continuous regime is designed and experimentally investigated. The continuous regime was achieved by optimizing the processes of heat released and heat removal from the working area of the atom chip. To do this, we use silver microwires and optimization of the heat dissipation through different heat removal channels. The main channels for heat dissipation are the contacts of the silicon substrate of the atom chip with a copper massive base and the heat sink through the clamps. The design of the atom chip ensures efficient heat transfer from the work area to the periphery through the metal layer of the atom chip. Using continuous operation regime, we cooled and trapped about 3 ∙ 10⁵ atoms near the atom chip.

Introduction

Atom interferometry is considered as a new platform for high precision fundamental experiments and for solving numerous applied problems [1]. Among the fundamental problems that can be solved using atomic interferometry are the following: the detection of gravitational waves [2], the search for dark matter [3], tests of dark energy theories [4], tests of the equivalence principle [5] and validity of quantum mechanics at macroscopic scale [6]. Among the applied problems, the most important are the study of the Earth's gravitational field [7] and applications to navigation [8].

One of the most important approaches in the implementation of atomic interferometry is the using atom chip technology [9], [10], [11]. At the heart of atom chip technology is the combination of advanced industrial microelectronics technology and atom optical techniques to generate and control ultracold atomic ensembles. An atom chip can provide the ability to localize and manipulate atoms and address individual atoms [12], [13]. The proper choice of the parameters of the atom chip allows to minimize the influence of parasitic processes occurring in the bulk of the atom chip on the temperature and lifetime of the ensemble of atoms on the atom chip. The atom chip also enables Bose-Einstein condensation (BEC) of atoms [14].

The use of an atom chip in atom interferometry is based on laser cooling of atoms and their subsequent localization near the surface of the atom chip through the use of microwires formed on the surface of the atom chip. This approach makes it possible to integrate all the elements for cooling, trapping, manipulation and measuring atomic ensembles in one device. It is expected that with the improvement of manufacturing of atom chips in the near future, there will be an opportunity to use them not only for new basic research, but also for the development of new technologies [9]. The projects MAUIS [15] and Cold Atom Laboratory [16] are the best examples. The MAIUS project observed the interference of atoms in the BEC state aboard a rocket in free fall at an altitude of more than 200 km. The Cold Atom Laboratory project works with Bose-Einstein condensate in microgravity aboard International Space Station. In both experiments, the BEC regime is achieved using the atom chip. These experiments demonstrate a high degree of reliability and technological flexibility of approaches to control atom ensembles using atom chip technology.

An important step in working with an atom chip is the primary cooling of the atoms. At this stage, it is necessary to reduce the velocity of the atoms from a value on the order of 300 m/s to a value that allows them to be trapped. The cooling and trapping of the atoms is carried out in several steps, depending on the desired final temperature, density and number of localized atoms. Primarily, the goal is to cool and localize a large number of atoms to temperatures at which they can be trapped in magneto-optical traps. This imposes certain requirements on the design of atom chips. Usually, multilayer configurations of atom chips are used [17]. There are the following reasons for this. First, the number of atoms localized near an atom chip depends on the shape of the primary magneto-optical potential [18]. It is easier to obtain a large number of cold and localized atoms using so-called U-shaped traps of macroscopic size whose spatial distribution of the magnetic field is close to the quadrupole field used in classical large-volume magneto-optical traps [18], [19]. Such traps are easier to form if additional macroscopic wires are placed under the main layer of the atom chip. Such an additional layer of macroscopic wires is essentially an additional atom chip [17], [19]. The additional atom chip requires a high current (up to ten amperes) flowing through the macroscopic wires [19]. The need for a high current arises from the fact that the atom trap is located at a great distance from the additional chip.

The second factor necessitating the use of macroscopic wires is the ability to organize efficient heat dissipation from the atom chip. In addition, when macroscopic conductors are used, heat generation can be reduced due to the low ohmic losses in macroscopic wires. These two factors allow efficient loading of atoms into the atom trap without a high thermal load on the main atom chip [20].

A major simplification of the atom chip could be the possibility to use microwires of the main atom-chip for primary cooling and localization of the atoms. However, this approach is associated with the need for efficient heat dissipation during long-term current flow, which is a complex technical problem. The use of the main atom chip for the first stage of cooling and trapping the atoms has a thermodynamic limitation: the need for efficient dissipation of the heat generated during the current flow through the microwires. Typically, the thickness of the wires of the main chip is a few microns. In this case, the release of heat when flowing currents of several amperes will limit the loading time of the atoms in the trap, even if wide conductors are used. It determines the pulsed operation of such single-layer atom chips. To achieve continuous operation of a single-layer atom chip, conditions must be found under which ohmic losses are minimized and heat dissipation from the microscopic region of wires is maximized. This work is devoted to the study of the possibility of realizing a single-layer atom chip in a continuous operating mode.