Skip to main content
SpringerLink
Log in

Performance Analysis of Sigma Delta ADC Developed using Electrically Doped GAPSb/InP Gate All Around Tunnel Field Effect Transistor

  • Original Research Article
  • Published:
Journal of Electronic Materials Aims and scope Submit manuscript

Abstract

Our focus is on the need for novel devices and the careful investigation of an electrically doped III–V ternary alloy-based gate-all-around tunnel field effect transistor (GAA-TFET) and its circuit applicability. We explored the role of band gap engineering in analyzing GAA-TFET using lattice-matched GaPSb and InP in the source region and channel/drain regions, respectively. This enhances DC and analog characteristics. The device features were then extracted using Silvaco and imported into a Cadence Virtuoso environment using the Verilog-A method to design a sigma delta ADC. The ADC output was then filtered and decimation using MATLAB, resulting into an 11-bit data converter with a 71.24-dB signal to-noise ratio.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13
Fig. 14
Fig. 15
Fig. 16
Fig. 17
Fig. 18
Fig. 19
Fig. 20

Similar content being viewed by others

References

  1. J.S. Kilby, Chem. Phys. Chem. 2, 482 (2002).

    Article  Google Scholar 

  2. A. Dixita, D.P. Samajdar, N. Bagga, and D.S. Yadav, Mater. Today Commun. 26, 101964 (2021)

    Article  Google Scholar 

  3. S.G. Narenda, ACM J. Emerg. Technol. Comput. Syst. 1, 1 (2005)

    Article  Google Scholar 

  4. J.T. Park and J.-P. Colinge, IEEE Trans. Electron Dev. 49, 12 (2002)

    Google Scholar 

  5. K. Boucart and A.M. Ionescu, IEEE Trans. Electron Dev. 54, 7 (2007)

    Article  Google Scholar 

  6. S. Yadav, C. Rajan, D. Sharma, and S. Balotiya, in VLSI Design and Test. In: 23rd International Symposium, VDAT (2019), pp. 694–701.

  7. C. Rajan, D. Sharma, and D.P. Samajdar, Superlattice Microst. 126, 72 (2019)

    Article  CAS  Google Scholar 

  8. B.V. Chandan, K. Nigam, C. Rajan, and D. Sharma, J. Comput. Electron. 18, 4 (2019)

    Google Scholar 

  9. S. Yadav, D. Sharma, B.V. Chandan, M. Aslam, D. Soni, and N. Sharma, Superlattice Microst. 117, 9 (2018)

    Article  Google Scholar 

  10. J. Patel, D. Sharma, S. Yadav, A. Lemtur, and P. Suman, Microelectron. J. 85, 72 (2019)

    Article  CAS  Google Scholar 

  11. ATLAS Device Simulation Software, Silvaco Int (Santa Clara, CA, USA, 2014)

  12. R. Gandhi, Z. Chen, N. Singh, and K. Banerjee, IEEE Electron Dev. Lett. 32, 4 (2011)

    Article  Google Scholar 

  13. S. Adachi, III–V Ternary and Quaternary Compounds in Handbook of Electronic and Photonic Materials (Springer, Berlin, 2017)

    Google Scholar 

  14. A. Bhattacharjee, M. Saikiran, and S. Dasgupta, IEEE Trans. Electron Dev. 64, 10 (2017)

    Google Scholar 

  15. C. Rajan, D.P. Samajdar, J. Patel, A. Lodhi, S.K. Agnihotri, D. Sharma, and A. Kumar, J. Electron. Mater. 49, 7 (2020)

    Article  Google Scholar 

  16. S. Pavan, R. Schreier, and G.C. Temes, Understanding Delta-Sigma Data Converters (Wiley, New York, 2017)

    Google Scholar 

  17. J. Candy, IEEE Trans. Commun. 34, 1 (1986)

    Article  Google Scholar 

  18. A.Y. Kwentus, Z. Jiang, and A.N. Willson, IEEE Trans. Signal Process. 45, 2 (1997)

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

  1. PDPM Indian Institute of Information Technology, Design and Manufacturing, Jabalpur, Madhya Pradesh, India

    Amit Kumar Behera, Chithraja Rajan, Dip Prakash Samajdar, Anil Lodhi & Jyoti Patel

  2. National Institute of Technology, Uttrakhand, Srinagar, India

    Komal Mishra

  3. National Institute of Technology, Hamirpur, Hamirpur, India

    Dharmendra Sing Yadav

Authors
  1. Amit Kumar Behera
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Chithraja Rajan
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Dip Prakash Samajdar
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Anil Lodhi
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Jyoti Patel
    View author publications

    You can also search for this author in PubMed Google Scholar

  6. Komal Mishra
    View author publications

    You can also search for this author in PubMed Google Scholar

  7. Dharmendra Sing Yadav
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Chithraja Rajan.

Ethics declarations

Conflict of interest

The authors declare that they have no conflict of interest.

Additional information

Publisher's Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Behera, A.K., Rajan, C., Samajdar, D.P. et al. Performance Analysis of Sigma Delta ADC Developed using Electrically Doped GAPSb/InP Gate All Around Tunnel Field Effect Transistor. J. Electron. Mater. 50, 5740–5753 (2021). https://doi.org/10.1007/s11664-021-09112-2

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11664-021-09112-2

Keywords

Search

Navigation