Sub-10 nm fabrication: methods and applications

Photolithography with higher resolution has always been a key topic in IC chip manufacturing. In IC chip manufacturing, photolithography is the preferred patterning solution due to its capability for large-volume production. The resolution is the most significant parameter to evaluate the capability of lithography techniques because it determines the limit of feature size in the follow-up fabrication processes. For a common photolithography system, the resolution of photolithography in modern IC manufacturing is determined by the following equation,

$$\begin{equation*}R = \frac{{{k_1} \times \lambda }}{{2 \times {\text{N}}{\text{.A}}{\text{.}}}},\end{equation*}$$

where k₁ presents the process factor, λ is the wavelength of illuminated light, and N.A. is the numerical aperture of the illumination system. Clearly, reducing the light wavelength directly improves the resolution. Several resolution enhancement techniques have been developed [85], such as off-axis illumination [86], phase-shifting masking [87], immersion lithography [88], and optical proximity correction [16]. To further scale down the power and FET density of IC chips, the self-aligned double patterning (SADP) technique is used to double the printed line density. This technique involves the use of chemical vapor deposition to grow a sidewall spacer on a core (template) pattern defined by conventional photolithography to create a pitch-halving hard mask [89], as shown in figure 4(a). However, doubling the line pattern density in the SADP process flow makes the process more complex because it requires additional lithography steps and photomasks for trimming closed-loop patterns into individual lines. Self-aligned quadruple [90] and octuple patterning [91] have also been demonstrated to further promote FET density scaling in chips, but the proportion of the lithography cost in the entire IC manufacturing soars to over 50%. Fortunately, extreme ultraviolet (EUV) lithography (λ = 13.5 nm) further increases the power and FET density scaling of IC chips [92, 93]. Higher-resolution patterning based on EUV lithography has been thoroughly developed (figure 4(b)) [94]. However, due to the high cost, EUV lithography is not suitable for device prototyping or small-volume production. For these specific applications, other techniques, such as DSA of BCPs, nanoimprinting and maskless direct writing provide complementary capabilities, which we will discuss in the following sections.

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BCP-based DSA is a high-resolution, low-cost patterning technique to generate uniform domain nanostructures in BCP film via the separation of microscale phases, as shown in figure 5(a). The spontaneous process of microphase separation results in BCP microdomain arrays with short-range order. With the implementations of graphoepitaxy or chemoepitaxy via pre-defined physical patterns or chemical contrast [95]. The domain structures of BCPs can be directed to form 'single-crystal' structures in which the position and orientation of microdomains can be determined. Subsequently, one of the separated microdomains can be selectively removed and served as the patterned template for pattern transfer processes, as shown in figure 5(b). Due to the capability of inexpensive processing to attain oriented and periodic structures with long-range order, BCP-based DSA is an emerging lithography process that can advance technology nodes in semiconductor manufacturing. In the current semiconductor industry requires sub-10 nm feature size. Exploring the capability of BCP-based DSA at the sub-10 nm scale usually involves thermodynamic control over the size and morphology of microdomains. Furthermore, the combination of high-resolution lithography technologies (e.g. DUV and nanoimprint lithography (NIL)) can assemble BCPs into essential dense and isolated nanofeatures as currently defined by semiconductor manufacturing [96, 97]. Scientists at IBM evaluated the potential of BCP-based DSA in a 7 nm fin-FET technology node and beyond and compared its performance to that of devices based on current photolithography techniques [98], as shown in figure 5(c). However, the resultant sub-10 nm polymer structures did not possess sufficient etch resistance for subsequent pattern transfer. Subsequential infiltration synthesis (SIS) effectively enhances the etch resistance by converting a specific block in a BCP to inorganic oxides using atom-layer deposition (ALD) [99, 100]. The conversion of sub-10 nm patterns from organic to inorganic material with SIS treatments can be used to strengthen mechanical stability and stiffness, which is significant for the fabrication of large-area nanoimprint molds for nanophotonic and nano-optic applications. However, the defect control of BCP-based DSA is a long-lasting issue for reliable nanopatterning. In particular, the defect level is the key parameter in semiconductor manufacturing with a strict requirement in defect density. Hence, most researchers in this promising technique topic attempt to reduce defect density.

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NIL is performed by pressing a mold with nanoscale patterns onto a flowable polymer or curable monomer and inversely duplicating the mold patterns onto the polymer, as shown in figure 6(a), which is a promising technique for large-volume production, especially for the applications of wafer level optical elements [103, 104].

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Due to its duplication manner in patterning, the resolution of NIL is determined by the feature size on the mold. A number of works have demonstrated that NIL has the capability of achieving sub-10 nm resolution [108–111]. Figure 6(b) schematically presents the fabrication of a sub-10 nm imprint mold by high-resolution patterning based on electron-beam lithography (EBL) or He⁺-FIB processes [112, 113]. Astin et al fabricated a high-precision Si mold by reactive ion etching (RIE) based on EBL-predefined hydrogen silsesquioxane (HSQ) masks (the left SEM image in figure 6(e)). They subsequently obtained a 5 nm wide nanofin on polymer (the right SEM image in figure 6(e)) [105]. NIL can duplicate patterns down to the 2 nm scale. As depicted in figure 6(c), by using single-walled carbon nanotubes as the original master [106], an isolated inverse channel as small as 2 nm can be duplicated onto a hard polydimethylsiloxane (PDMS) mold. Using the duplicated hard-PDMS mold, a single 2.4 nm wide line can be imprinted on polyurethane (see figure 6(f)). Meanwhile, high-density features with 6 nm half pitches have been obtained using sub-10 nm edge structures in superlattice materials (figure 6(d)) as the molds [107], as shown in figure 6(g). However, for practical large-volume industrial applications, low-cost fabrication of large-area molds with long lifetime and high-fidelity duplication of the features over large areas are still challenging for NIL, especially when involving quasi-3D structures, such as slanted features. Due to defect, reproducibility, and overlay inaccuracy issues, NIL is difficult to apply in the IC industry. As a result, this method is more appropriate for non-IC applications.

EBDW is a flexible fabrication technique for patterning without any masks. The most sophisticated EBL systems have the capability to achieve 1 nm scale spot size and even down to the angstrom scale. Such small spot size enables us to achieve high-resolution and high-flexibility patterning based on different principles [114, 115].

For all processes based on EBL, the first step is to obtain ultrasmall resist structures, a typical process flow is shown in figure 7(a). Similar to photolithography, EBL is the most commonly used patterning method based on the EBDW strategy. V Manfrinato et al fabricated sub-5 nm features using 200 kV scanning EBL in a transmission electron microscope (TEM) [116, 117]. In their work, the suppression of electron scatterings is a key factor for achieving such high-resolution patterning by adopting ultrathin resist films and freestanding membrane substrates. Yang et al demonstrated sub-10 nm nested-L features based on an HSQ resist using salty developer with high development contrast [118–120]. The results are shown in figure 7(b). Note that the sub-10 nm features reported in these works are only defined on the resist. High-fidelity pattern transfer is also significant to sub-10 nm fabrication, which is not discussed in this section.

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Unlike lithography, electron-beam induced deposition (EBID) can directly fabricate functional structures, as schematically depicted in figure 7(c). van Drop et al manufactured periodic dots of about 2 nm with a spacing of 4 nm using an environmental TEM (200 kV) equipped with a gas injection system [121], as presented in figure 7(d). In addition, Shen et al reportedly used electron beam healing in TEM to repair two-dimensional MoS₂ crystals in-situ [122]. Compared to induced deposition, electron-beam induced etching (EBIE) is used to fabricate inverse nanostructures. Yemini et al presented the smallest nanopore of 17 nm on an Si membrane fabricated by EBIE with the assistance of XeF₂ gas [10]. By optimizing the pressure and process rate, a sub-10 nm nanopore could be achieved with an appropriate etching rate. However, limited efficiency and the precursor species impedes electron-beam induced processing for large-area and fast nanopatterning, and the impurities of the resultant structures caused by carbon contamination is an issue in practical applications.

High-energy focused electron beams (FEBs) can perform direct patterning based on atomic-scale sculpting via bombardment, as shown in figure 7(e). Drndic et al performed the nanofabrication of metallic structures and nanodevices on an insulating membrane using transmission FEB sculpting at 200 keV [123–126]. Zandbergen et al also fabricated 0.6 nm gaps in nanoelectrodes using transmission FEB sculpting (figure 7(f)) [127]. An advantage of such processes is that the fabrication can take place in-situ monitoring enabled by high-resolution imaging, thus, high precision can be realized.

Similarly to FEB-based fabrication techniques, FIB can be used for nanofabrication either via lithography, milling, or induced processing (e.g. deposition and etching) [128]. Extremely small interaction volume is necessary to obtain sub-10 nm fabrication using FIB [129]. Recently, most sub-10 nm fabrication based on FIB utilizes a focused helium ion beam (He⁺-FIB) due to its sub-nanometer spot size [130]. Less scatterings from the resist and substrate greatly mitigate the proximity effect in high-density FIB patterning compared to EBL. As shown in figures 8(a) and (b), Li et al demonstrated a resolution of 10 nm pitch in nested-L lines using HSQ resist which is difficult to achieve using the EBL process [113]. However, the relatively high line-edge roughness in sub-10 nm features, caused by shot noise, and inevitable damage to underlying materials and substrates are the challenges in lithography based on He⁺-FIB.

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Compared to the required pattern transfer in resist-based lithography, FIB milling is a direct method to fabricate functional structures via selectively removing materials based on sputtering, as shown in figure 8(c). This advantage makes FIB milling a popular technique for fabricating inverse structures (e.g. holes [131] and slits [132, 133]). The nanometer spot size in He⁺-FIB enables the reliable sub-10 nm resolution in milled nanofeatures. A high-quality plasmonic resonator based on ring-like slits with 8 nm width was fabricated [134], as shown in figure 8(d). Nevertheless, because the extremely small spot size of a He⁺ ion beam originates from the singe atom emitter in an ion source [135], the low beam current and lighter ion mass lead to extremely slow fabrication speeds, making this method only feasible for fundamental research.

FIB induced deposition and etching can also be performed for nanoscale structuring, as shown in figures 8(e)–(g). Ultrasmall spot size is crucial to the sub-10 nm resolution in FIB induced processing. As shown in figure 8(f), with He⁺-FIB, Wu et al presented single cobalt (Co) lines with minimum linewidths of 10 nm using a Co₂(CO)₈ gas precursor for circuit editing [136]. Meanwhile, Stanford et al reported 9 nm wide WS₂ ribbons patterned by XeF₂-assisted He⁺-FIB induced etching [137], as shown in figure 8(h). Similar to lithography and milling processes, damages due to ion bombardment and implantation on substrates and other functional materials are unacceptable in some specific applications, such as electronic devices, which limits the broad application of FIB-induced processes.

TBN is carried out by scanning a nanoscale tip in close to a substrate to execute a patterning event initiated by an external stimulus. The local external stimulus can be introduced from thermal, electronic, or mechanical effects or molecular diffusion localized to a nanoscale volume between the tip, with high curvature, and the substrate.

As early as 1993, Crommie et al demonstrated atom manipulation using a STM [138], as shown in figure 9(a). They built a quantum corral where they positioned 48 iron atoms on an atomically flat copper (111) crystal surface under extremely high vacuum and 4 K temperature. In 1999, Lyding et al performed atomic lithography to remove hydrogen atoms from a hydrogen-passivated Si surface with electron stimulated desorption process using an atom-scale tip of STM (see figure 9(b)) [139]. The selective deposition in the depassivated area can be used as a mask pattern for further pattern transfer. With this approach, Si feature sizes as small as 2 nm were achieved.

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Unlike the extreme working conditions required in STM, atomic force microscope (AFM) has broader applications because it works on dielectric substrates in atmosphere and even solution. Furthermore, various scanning probe lithography (SPL) systems based on AFM have been developed in the later decades. In thermal-based SPL, a resolution of 7 nm half pitch Si features can be achieved via RIE with a thermal SPL defined sub-10 nm polymer/SiO₂ mask [140], as presented in figure 9(c). Except for lithography, thermal AFM can also initiate nanoscale chemical reactions, such as reducing oxidized graphene to obtain sub-10 nm semiconductor graphene ribbons. The atomic-scale-sharpness tip not only confines energy to conduct lithography but can also be used to perform resist removal using field-emitted, low-energy electrons from the tip. In figure 9(d), Rangelow's team demonstrated lithographic approaches for 'single nanometer manufacturing' [141–144]. They achieved feature sizes as small as 5 nm on a calixarene molecular glass resist using the electric field current-controlled SPL method [145]. Single ion implantation can also be achieved using a hollow tip and small aperture mounted on a pre-collimation membrane [146], which is supposed to be a key enabling technology for developing quantum devices.

Another important technique in tip-based approaches is 'dip-pen' nanolithography (DPN). DPN was firstly demonstrated by Mirkin's group via delivering alkanethiols molecules from an AFM tip to a gold substrate through capillary transportation [147], as shown in the left graph of figure 9(e). Using this process, 30 nm wide lines were obtained on a gold substrate, as shown in the right picture of figure 9(e). The further work demonstrated the construction of an organic transistor using DPN via selectively positioning organic semiconductor molecules into gap electrodes [148, 149]. In DPN, tip-substrate molecular transport is a complicated process that is influenced by many parameters, such as the tip shape, surface chemistry, the mobility of the ink on the tip, temperature, environmental humidity, and water solubility of the ink.

The 'sketch and peel' strategy was proposed by the authors' group in 2016. This is a novel patterning strategy based on serial direct writing techniques. Unlike the conventional strategy which exposes an entire area, the 'sketch and peel' method only exposes the outlines of target structures with a FEB. After film deposition, a stripping step is performed to define the desired structures by selectively removing the outer metallic film, as seen in figure 10(a) [150]. Due to the advantage of outline exposure, the 'sketch and peel' strategy can greatly improve patterning efficiency by more two orders of magnitude and can also mitigate the proximity effect for high-fidelity fabrication of extreme features with sharp corners and nanogaps [151]. In figures 10(b), uniform gap of 15 nm in plasmonic oligomers and nanogap electrodes 20 nm apart were presented in the original work [152–156].

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The 'sketch and peel' strategy can also be applied in FIB fabrication, except for EBL, which significantly extends the patterning capability of FIB for preparing particle-like structures, as depicted in figure 10(c). For He⁺-FIB, this novel strategy enables it to possess a patterning capability that was previously impossible. Applying this advanced process, a series of plasmonic assemblies with sub-10 nm gaps have been demonstrated in Chen's work, as shown in figure 10(d) [157, 158].

This section summarizes smart approaches in pattern transfer to fulfill the fabrication of sub-10 nm features in devices [159–161]. Sub-10 nm fabrication in these approaches does not depend on the lithographic resolution, which is in contrast achieved via tricky methods or effects including film deposition, angular evaporation, nanometer scale stenciling, secondary deposition, etc.

3.1.8.1. Film-defined nanogap.

Film deposition to realize a given thickness is a well-developed technology in nanofabrication. Ultrasmall nanogaps can be defined via edge lithography by involving conformally-coated nanofilm thickness on the sidewall of first patterns to separate the second deposited materials [162], as shown in figure 11(a). The conformal coating is commonly performed by atomic-layer deposition [34]. In addition, the film thickness can also be determined by the length of organic molecules self-assembled on the first-defined pattern. Oh et al demonstrated that edge lithography is robust and scalable for wafer-scale fabrication of sub-10 nm plasmonic gaps and gap electrodes [80]. With this concept, Beesley et al presented that self-assembly monolayers can be used as the separation for sub-15 nm patterning of asymmetric metallic electrodes [163]. Moreover, Mirkin's group developed on-wire lithography in which the gap size was determined by the thickness of one segment on a nanowire grown by electrochemical deposition in anodic oxidization of an aluminum template [164]. The materials in different segments can be selectively removed in the subsequent etching procedure.

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3.1.8.2. Angle evaporation.

3.1.8.3. Nanostencil lithography.

3.1.8.4. Secondary sputtering lithography.

Templated self-assembly is a bottom-up approach for ordering or placing dispersive components with programmable engineering. Programmable engineering can be performed by physical templates and molecular templates. Physical templates are commonly defined by top-down lithography methods. Based on the capillarity effect of the meniscus at the ridge template, ultrathin structures with ∼10 nm widths can be formed at the edge of a template in the following etching process [176], as demonstrated in figure 12(a). Via template-directed DSA process, Mohamod et al demonstrated deterministic arrangement of sub-10 nm Au dots with low defect density in prepatterned HSQ structures [177], as seen in figure 12(b). The template can also utilize smart molecules to direct the self-organization of dispersive components. Fan et al demonstrated the capability of tailoring the oligomerization of plasmonic nanoparticles with molecular templates (see in figure 12(c)) [81]. In this work, a 2 nm gap in cluster was achieved by controlling the length of ligand on synthesized plasmonic nanoparticles, which exceeds the resolution of the best lithography approaches. DNA-based self-assembly can fabricate complex components with DNA scaffolding [178, 179], as shown in figure 12(d). This fabrication method produces well-designed nanopatterns consisting of ordered gold nanoparticles on preassembled DNA scaffolding surfaces [180].

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Cracking is a simple mechanical approach to fabricate ultrasmall nanogaps. To perform reliable fabrication with controlled gap size and position, mechanical cracking is carried out with stress concentration in prepatterned notches and necks defined by lithographic approaches. The stress concentration can be induced by various mechanical loadings, such as bending [82, 181–183], electromigration [184–187], stress, and swelling [188–190]. As shown in figures 13(a) and (c), a closed-loop electric feedback system is used to monitor the moment of crack initiation at the notch and neck position induced by break junctions [82] and electromigration [69], respectively. The cracking-defined gap sizes of the above two methods can approach the atomic scale. Cracking induced by stress concentration using local irradiation [188] and regional swelling [190] are shown in figures 13(b) and (d), respectively. Under FIB irradiation, authors tuned the cracking with a fine dosage at the single grain boundary and attained a 1.6 nm gap. Swelling to initiate cracking is executed by the asymmetric expansion ratio of metal and polymer films in a predefined notch, in which a droplet of organic solvent locally dips at the notch area and stimulates cracking. After the solvent evaporates, the resultant gap size is about 30 nm. Note that although mechanical cracking methods can fabricate ultrasmall nanogaps, it is difficult to realize uniform gap size and shape, and fine-tuning the gap size is also challenging.

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In this part, we summarize the main post-assembling approaches that can effectively fabricate ultrasmall nanogaps down to the sub-10 nm scale by actively gathering prepatterned structures with mechanical approaches [155, 191]. Post-assembling steps yield gap size that are smaller than those directly fabricated by conventional lithography process. As depicted in figure 14(a) nanobowtie was first transferred on a pre-stretched elastomeric substrate, and two triangles with tip-to-tip arrangement moved closer to each other when the strain was released [192]. The gap size can be further shrunk to 5 nm. Cheng et al generated precise nanogaps with laser shock induced superplastic formation [193]. As shown in figure 14(b), prepatterned metal nanodimers were compressed, inducing lateral expansion with a high-deformation ratio. The gap size can be finely tuned by laser energy, and the realized gap can be as small as 5 nm. The cohesion of HAR structures stimulated by the capillary force in the meniscus during solvent drying is also used for nanogap fabrication [194, 195]. The gap size can be tuned by the thickness of coating layer on HAR structures. As shown in figure 14(c), arrayed gold nanofingers orderly cohere under the stimulus of a droplet of analyzer solvent, and the analyzer molecules absorbed on a gold surface form sub-nanometer gaps. Meanwhile, the analyzer molecules are placed in the gap of the plasmonic fingers [196]. The gap size is the thickness of the double molecular layers between the cohesive plasmonic fingers. In addition, actively tuning the nanogap size by approaching two metal-coated nanospheres at the free end of AFM tips was demonstrated by Savage et al [197], as seen in figure 14(d). The gap size can be finely tuned by electrostatic force. Sub-nanometer gaps that support the onset of quantum tunneling in a plasmonic cavity was demonstrated.

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Additive post-trimming is carried out to obtain higher resolution in features via material deposition. As shown in figure 15(a) local electrodeposition with self-inhibited reagent depletion was conducted on laterally disposed electrodes [198]. Lam et al also performed additive post-trimming with electrodeposition to shrink a separation between electrode pair from several tens of nanometers to the sub-10 nm scale [199]. However, interpenetrating jagged elements tend to form at the gap electrodes, limiting the process uniformity and reproducibility. The lateral growth that occurs in vacuum deposition can also be applied to perform controllable separation. As depicted in figure 15(b), vacuum evaporation was used to shrink the separation of clustered structures [200, 201]. The edge roughness of the resultant structure is better than that defined by electrodeposition. Hatzor and Weiss used a molecule ruler to scale down nanostructures [83]. As shown in figure 15(c), specific decoration of layer-by-layer mercaptoalkanoic acid molecules on gold surface can be performed to shrink the middle structure after pattern transfer. Post molecular trimming can produce a thinnest Pt line (<15 nm) the middle structure. Some other additive post-trimming examples include using ALD deposition to shrink the dimension of nanopores and nanoslits [202–204].

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Subtractive post-trimming is executed by the removal and consumption of materials in target structures to shrink the feature sizes. For sub-10 nm fabrication, atomically precise etching processes were carried out to reliably define nanogaps below 10 nm or sharp tip with sub-10 nm radius of curvature. As shown in figures 16(a) and (b), sub-10 nm gaps on patterned structures were fabricated by etching-based post trimming using 200 kV transmission FEB and He⁺-FIB [84, 127], respectively. Except for the removal of materials, the consumption of material with chemical reactions is another post-trimming approach. Si oxidization is a mature technique in semiconductor manufacturing, which has atomic precision for controlling the thickness of oxide layers. Walavalkar et al demonstrated the oxidization process for Si nanopillars and achieved a core Si nanowire with a diameter of 4 nm [205], as shown in figure 16(c). Self-assembled molecular nanopatterns were defined with the recognition of biotin-streptavidin through multiple subtractive micro-contact printing with nanoscale offsets in every step [206], as shown in figure 16(d). AFM images display the decreasing of feature sizes from 90 to 15 nm. The main challenge of this method is the actuation precision of overlay in multiple PDMS contact microprinting. Subtractive post-trimming has also shown a particular capability of fine tuning the sharpness of nanotips for imaging or nanofabrication either via electrochemical or FIB processes [75, 207].

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As the separation size between two conductors decreases to a sufficiently small distance, the electrons in one conductor can pass through barriers and generate the tunneling effect. Based on the tunneling effect, tunneling devices (e.g. SET) and tools (e.g. STM) have been demonstrated in recent decades [235, 236]. In tunneling devices, reliable fabrication of small gaps with single-digit nanometers is crucial. Goldhaber-Gordon et al reported an SET device which consists of three gate electrodes and one collector electrode, as shown in figure 21(a) [237]. To obtain nanometer gap and island size, this SET was fabricated by electron-beam lithography, which was critical to observe the Kondo effect. Schoelkopf et al demonstrated an electrometer based on the configuration of SET [238]. The electrometer was fabricated by an EBL-defined suspended resist bridge and a double-angle evaporation method, which allowed the study of single electron tunneling oscillations, as shown in the SEM image of figure 21(b). The direct-current conductance displayed Coulomb blockade oscillations, and the reflected carrier power was strongly correlated with the transistor's conductance. Ultrasmall gaps can also be used to the realize high-temperature superconductive (HTS) hybrid devices. Baghdadi et al fabricated a 35 nm YBa₂Cu₃O_7−δ (YBCO) encapsulated nanogap defined by a conformally deposited film thickness [239], as shown in figure 21(c). Such a small superconducting YBCO nanogap bridged with a conventional metal induced a proximity Josephson coupling. Very recently, researchers performed stable plasmon-induced tunneling in particle-on-film configurations, in which the nanogaps were defined by an ultrathin ALD-coated dielectric layer [240], as shown in figure 21(d). The device consisted of a vacuum tube with an optically excited emitter or photocathode, similar to a microscale phototube, which is supposed to have potential applications in carrier-envelope phase photodetectors.

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Quantum confinement is promoted when the size of a material is comparable to the de Broglie wavelength of electron wave function, which can enable energy band engineering of electrons in various applications. The most well-known examples are semiconductor quantum dots and gold nanocrystals for luminescence, which have already been widely used in industry. The NV center is another important example, which is regarded as a promising candidate for quantum light sources in integrated photonics because of its ease of fabrication and integration compatibility with waveguides. Hausmann et al demonstrated single NV centers hosted in suspended diamond photonic crystal cavities with quality factors up to 6000, as shown in figure 22(a) [244]. The emission property of the NV center can be tuned by its size. Electron band engineering can also enhance the performance of catalysts by tuning their dimensions and introducing non-noble metal to form alloys. For instance, Chen et al demonstrated alloy nanocrystal libraries via pyrolysis of metalorganic precursor nanopatterns defined by SPL [245], as shown in figure 22(b). Using polymer nanoreactor-mediated synthesis, a quinary alloy nanocrystal (∼30 nm) can be prepared with five metallic elements (Au, Ag, Co, Cu and Ni), which has the potential to obtain multimetallic nanoparticles toward higher compositional diversity and structural complexity for catalysis. The electronic properties can be engineered via quantum confinement, a famous example of this effect is graphene. Graphene is a promising electronic material due to its extremely high mobility. Zero bandgap limits its application in transistor devices, but non-zero bandgap can form in graphene nanoribbons. The bandgap increases for smaller nanoribbons. Dai et al reported that sub-10 nm graphene nanoribbons with smooth edges can act as semiconductors. Furthermore, they applied a sub-10 nm graphene nanoribbon with adequate bandgap to fabricate FETs which could be operated at room temperature [246], as shown in figure 22(c). More interestingly, quantum confinement has the potential to convert indirect bandgap semiconductors to direct bandgap semiconductors for luminescence applications. To this end, Si nanocrystals have been extensively investigated. For example, Valenta et al prepared Si quantum dots using two-stage oxidization of regular Si nanopillars which were fabricated by EBL and plasma etching, as shown in figure 22(d) [247]. The photoluminescence spectroscopy can be detected at room temperature.

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