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Hardware Implementation for Bipartite Belief Propagation Polar Decoding with Bit Flipping

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Abstract

For the scenarios with high throughput requirements, the belief propagation (BP) decoding is one of the most promising decoding strategies for polar codes. By pruning the redundant variable nodes (VNs) and check nodes (CNs) in the original factor graph, the graph is condensed to a sparse bipartite graph that is similar to the graph for low-density parity-check (LDPC) codes. In this paper, we introduce the bit flipping scheme into the LDPC-like BP (L-BP) decoding and propose two methods to identify the error-prone VNs. By additional decoding attempts, the L-BP flip (L-BPF) decoding improves the error-correction performance with a similar average complexity for high Eb/N0 values. The simulation results show that the L-BPF decoding achieves 0.25 dB gain compared with the L-BP decoding. Finally, a parallel decoder with the proposed L-BPF algorithm for an (256,128) polar code is implemented using 65nm CMOS technology, and it delivers a throughput of 1877.3 Mbps.

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Correspondence to Chuan Zhang.

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Ji, H., Gong, Z., Shen, Y. et al. Hardware Implementation for Bipartite Belief Propagation Polar Decoding with Bit Flipping. J Sign Process Syst 93, 1149–1157 (2021). https://doi.org/10.1007/s11265-020-01625-z

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