Abstract
A phase frequency detector (PFD) with a very low dead zone is proposed which is based on a configuration adaptable to both CMOS or carbon nano-tube transistors (CNTFETs). In the first step the proposed configuration is designed using CMOS transistors, and then CNTFETs are substituted to improve the speed and reduce the propagation delay. The proposed PFD in addition to very low dead zone, has low power consumption and high frequency range of operation, which are achieved as a result of the elimination of the reset path. The simulation results based on 32 nm technology for CNTFET and 180 nm technology for CMOS, illustrate that CNTFET-based proposed circuit dissipates 2 µW and has frequency of operation up to 30 GHz, and the dead zone equal to 1 ps. Compared to the conventional PFD based on CMOS technology, its dead zone and power consumption are lower. In addition, the effects of blocks’ parameters including the phase detector, which affect the operation of the phase locked loop, or delay locked loop, are systematically analyzed.
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True Single-Phase Clock.
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Soltani Mohammadi, M., Sadughi, S. & Razaghian, F. Low-power high-speed phase frequency detector based on carbon nano-tube field effect transistors. Analog Integr Circ Sig Process 108, 377–389 (2021). https://doi.org/10.1007/s10470-021-01845-8
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DOI: https://doi.org/10.1007/s10470-021-01845-8