Skip to main content
Log in

High Resolution Pulse Propagation Driven Trojan Detection in Digital Systems

  • Published:
Journal of Electronic Testing Aims and scope Submit manuscript

Abstract

Outsourcing of IC manufacturing has opened the possibility of intentionally modifying the operation of the IC in a subtle way so that it is extremely difficult to detect, in conventional functional testing. Security in computation is no longer a software only issue, the underlying computing hardware may also be compromised. As occurrence of Trojan activation is rare event, it needs to be detected without actually activating it. In digital systems Trojan payload takes input from low activity nodes of the original circuit. Even when the Trojan is not activated, these tapings of original circuit nodes exhibit extra capacitive load. This work is geared towards detecting these extra capacitances with unprecedented accuracy to uncover malicious Trojans in the circuit. We have shown that pulse propagation in logic circuit can be used to detect any extra stray capacitance at any circuit node with 20-25X better diagnostic resolution than that of any other delay and frequency measurement based techniques. We have developed a current sensor that monitors supply currents at predetermined low activity gates. If any one of these nodes are tapped for Trojan, then due to extra capacitive load the applied pulse gets killed and the difference maximum current (before and after pulse) indicate Trojan occurrence. While majority of the Trojan detection techniques loose diagnostic accuracy with the size of the circuit and amount of process variation, diagnostic capability of the proposed pulse based technique is independent of size of the circuit. The proposed scheme can be integrated into JTAG boundary scan to provide a complete solution for hardware Trojan detection in digital systems.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13
Fig. 14
Fig. 15
Fig. 16
Fig. 17
Fig. 18
Fig. 19
Fig. 20
Fig. 21
Fig. 22
Fig. 23
Fig. 24
Fig. 25
Fig. 26
Fig. 27
Fig. 28
Fig. 29
Fig. 30
Fig. 31
Fig. 32
Fig. 33

Similar content being viewed by others

References

  1. Aarestad J, Acharyya D, Rad R, Plusquellic J (2010) Detecting Trojans through leakage current analysis using multiple supply pad IDDQs. IEEE Transactions on Information Forensics and Security 5(4):893–904. https://doi.org/10.1109/TIFS.2010.2061228

  2. Banga M, Hsiao MS (2009) A novel sustained vector technique for the detection of hardware Trojans. In Proc. 22nd International Conference on VLSI Design, 5–9 Jan. 2009, pp 327–332. https://doi.org/10.1109/VLSI.Design.2009.22

  3. Becker GT, Regazzoni F, Paar C, Burleson WP (2013) Stealthy dopant-level hardware Trojans. In Proc. 15th International Workshop on Cryptographic Hardware Embedded Systems (CHES), Santa Barbara, CA, USA, August 20–23, 2013. G. Bertoni and J.-S. Coron Eds. Berlin, Heidelberg: Springer Berlin Heidelberg, pp 197–214

  4. Bisdounis L, Nikolaidis S, Koufopavlou O (1998) Analytical transient response and propagation delay evaluation of the CMOS inverter for short-channel devices. IEEE Journal of Solid-State Circuits 33(2):302–306. https://doi.org/10.1109/4.658636

  5. Board DS, Task force on high performance microchip supply, http://www.acq.osd.mil/dsb/reports/ADA435563.pdf

  6. Byeongju C, Gupta SK (2012) Efficient Trojan detection via calibration of process variations. In Proc. IEEE 21st Asian Test Symposium (ATS), 19–22 Nov. 2012, pp 355–361, https://doi.org/10.1109/ATS.2012.64

  7. Cha B, Gupta SK (2013, 18–22 March 2013, 2013) Trojan detection via delay measurements: A new approach to select paths and vectors to maximize effectiveness and minimize cost. In Proc. Design, Automation & Test in Europe Conference & Exhibition (DATE), pp 1265–1270. https://doi.org/10.7873/DATE.2013.262

  8. Chakraborty RS, Narasimhan S, Bhunia S (2009) Hardware Trojan: threats and emerging solutions. In Proc. IEEE International High Level Design Validation and Test Workshop (HLDVT), 4–6 Nov. 2009, pp 166–171. https://doi.org/10.1109/HLDVT.2009.5340158

  9. Deyati S, Muldrey BJ, Singh A, Chatterjee A (2014) High resolution pulse propagation driven Trojan detection in digital logic: optimization algorithms and infrastructure. In Proc. IEEE 23rd Asian Test Symposium (ATS), 16–19 Nov. 2014, pp 200–205. https://doi.org/10.1109/ATS.2014.45

  10. Ferlet-Cavrois V, Pouget V, McMorrow D, Schwank JR, Fel N, Essely F, Flores RS, Paillet P, Gaillardin M, Kobayashi D, Melinger JS, Duhamel O, Dodd PE, Shaneyfelt MR (2008) Investigation of the propagation induced pulse broadening (PIPB) effect on single event transients in SOI and bulk inverter chains. IEEE Trans Nucl Sci 55(6):2842–2853. https://doi.org/10.1109/TNS.2008.2007724

    Article  Google Scholar 

  11. Gili X, Barcelo S, Bota SA, Segura J (2012) Analytical modeling of single event transients propagation in combinational logic gates. IEEE Transactions Nuclear on Science 59(4):971–979. https://doi.org/10.1109/TNS.2012.2187071

  12. Goel P, Rosales BC (1981) PODEM-X: an automatic test generation system for VLSI logic structures. In Proc. 18th Design Automation Conference, June 1981, pp 260–268, https://doi.org/10.1109/DAC.1981.1585361

  13. Hamad GB, Hasan SR, Mohamed OA, Savaria Y (2014) New insights into the single event transient propagation through static and TSPC logic. IEEE Trans Nucl Sci 61(4):1618–1627. https://doi.org/10.1109/TNS.2014.2305434

    Article  Google Scholar 

  14. Hasan SR, Mossa SF, Elkeelany OSA, Awwad F (2015) Tenacious hardware trojans due to high temperature in middle tiers of 3-D ICs. In Proc. IEEE 58th Midwest Symposium on Circuits and Systems (MWSCAS), 2–5 Aug. 2015, pp 1–4. https://doi.org/10.1109/MWSCAS.2015.7282148

  15. Hong T et al. (2010) QED: quick error detection tests for effective post-silicon validation. In Proc. IEEE International Test Conference (ITC), 2–4 Nov. 2010, pp 1–10. https://doi.org/10.1109/TEST.2010.5699215

  16. Hoque T, Mustapa M, Amsaad F, Niamat M (2015) Assessment of NAND based ring oscillator for hardware Trojan detection. In Proc. IEEE 58th Midwest Symposium on Circuits and Systems (MWSCAS), 2–5 Aug. 2015, pp 1–4. https://doi.org/10.1109/MWSCAS.2015.7282110

  17. http://www.trust-hub.org/ [ Accessed on Jun-06-2018]

  18. Kan X, Tehranipoor M (2013) BISA: Built-in self-authentication for preventing hardware Trojan insertion. In Proc. IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), 2–3 June, 2013. pp 45–50. https://doi.org/10.1109/HST.2013.6581564

  19. Kayssi AI, Sakallah KA, Burks TM (1992) Analytical transient response of CMOS inverters. IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications 39(1):42–45. https://doi.org/10.1109/81.109241

  20. Kim D, Ambler T (2001) Robust transition density estimation by considering input/output transition behavior. In Proc. IEEE International Symposium on Circuits and Systems (ISCAS, Cat. No.01CH37196), 6–9 May 2001, pp. 403–406. https://doi.org/10.1109/ISCAS.2001.922070

  21. Kumar P, Srinivasan R (2014) Detection of hardware Trojan in SEA using path delay. In Proc. IEEE Students' Conference on Electrical, Electronics and Computer Science (SCEECS), 1–2 March 2014, pp 1–6. https://doi.org/10.1109/SCEECS.2014.6804444

  22. Massengill LW, Tuinenga PW (2008) Single-event transient pulse propagation in digital CMOS. IEEE Transactions on Nuclear Science 55(6):2861–2871. https://doi.org/10.1109/TNS.2008.2006749

  23. Narasimhan S et al (2010) Multiple-parameter side-channel analysis: A non-invasive hardware Trojan detection approach. In Proc. IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), 13–14 June 2010, pp 13–18. https://doi.org/10.1109/HST.2010.5513122

  24. Narasimhan S, Wen Y, Xinmu W, Mukhopadhyay S, Bhunia S (2012) Improving IC security against Trojan attacks through integration of security monitors. IEEE Design & Test of Computers 29(5):37–46. https://doi.org/10.1109/MDT.2012.2210183

  25. Rai D, Lach J (2009) Performance of delay-based Trojan detection techniques under parameter variations. In Proc. IEEE International Workshop on Hardware-Oriented Security and Trust (HOST), 27–27 July 2009, pp. 58–65. https://doi.org/10.1109/HST.2009.5224966

  26. Roth JP (1966) Diagnosis of automata failures: a Calculus and a method. IBM J Res Dev 10(4):278–291. https://doi.org/10.1147/rd.104.0278

    Article  MathSciNet  MATH  Google Scholar 

  27. Deyati S, Muldrey BJ, Chatterjee A (2016) Trojan detection in digital systems using current sensing of pulse propagation in logic gates. In Proc. 17th International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, USA, pp 350–355

  28. Salmani H, Tehranipoor M, Plusquellic J (2009) New design strategy for improving hardware Trojan detection and reducing Trojan activation time. In Proc. IEEE International Workshop on Hardware-Oriented Security and Trust (HOST). 27–27 July 2009, pp 66–73. https://doi.org/10.1109/HST.2009.5224968

  29. Salmani H, Tehranipoor M, Plusquellic J (2012) A novel technique for improving hardware Trojan detection and reducing Trojan activation time. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20(1):112–125. https://doi.org/10.1109/TVLSI.2010.2093547

  30. Song P, Stellari F, Pfeiffer D, Culp J, Weger A, Bonnoit A, Wisnieff B, Taubenblatt M (2011) MARVEL: Malicious alteration recognition and verification by emission of light. In Proc. IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), 5–6 June 2011, pp 117–121. https://doi.org/10.1109/HST.2011.5955007

  31. Sutherland I, Sproull B, Harris D (1999) Logical effort: designing fast CMOS circuits. Morgan Kaufmann Publishers Inc., p. 240

  32. Wei S, Potkonjak M (2013) The undetectable and unprovable hardware Trojan horse. In Proc. 50th ACM/EDAC/IEEE Design Automation Conference (DAC), 29 May-7 June 2013, pp 1–2. https://doi.org/10.1145/2463209.2488912

  33. Wolff F, Papachristou C, Bhunia S, Chakraborty RS (2008. DATE '08, 10–14 March 2008) Towards Trojan-free trusted ICs: problem analysis and detection scheme. In Proc. Design, Automation and Test in Europe Conference (DATE), pp 1362–1365. https://doi.org/10.1109/DATE.2008.4484928

  34. Yier J, Makris Y (2008) Hardware Trojan detection using path delay fingerprint. In Proc. IEEE International Workshop on Hardware-Oriented Security and Trust (HOST), 9–9 June 2008, pp 51–57. https://doi.org/10.1109/HST.2008.4559049

  35. Cao Y, Chang C-H, Chen S (2014) A cluster-based distributed active current sensing circuit for hardware Trojan detection. IEEE Transactions on Information Forensics and Security 9(12):2220–2231. https://doi.org/10.1109/TIFS.2014.2360432

Download references

Acknowledgments

This research was supported by NSF under Grant CNS 1441754 and by SRC under GRC Task 2555.001.

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Sabyasachi Deyati.

Additional information

Responsible Editor: S. Bhunia

Publisher’s Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Deyati, S., Muldrey, B.J., Singh, A.D. et al. High Resolution Pulse Propagation Driven Trojan Detection in Digital Systems. J Electron Test 37, 41–63 (2021). https://doi.org/10.1007/s10836-021-05926-4

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10836-021-05926-4

Keywords

Navigation