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Soft Errors Sensitivity of SRAM Cells in Hold, Write, Read and Half-Selected Conditions

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Abstract

This work evaluates the Soft Error sensitivity of the complete SRAM architecture using the 16 nm Bulk CMOS technology model. The paper investigated the fault propagation in cells and bitlines during the Hold, Read, Write operations, and the half-selection situation. The 6T, 8T, 9T, 8TSER, and DICE SRAM cells are compared not only about the radiation effects but also observing the timing, power, and static noise margin outcomes. DICE cell presents the highest robustness to the radiation effects. The 8T-SER presented the best stability results. The half-selection situation shows the potential to increase the cell sensitivity by \(\approx\) 50 \(\%\) compared to the Hold perspective.

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Acknowledgments

This study was financed in part by the Coordenação de Aperfeiçoamento de Pessoal de Nível Superior - Brasil (CAPES) - Finance Code 001 and by the Brazilian National Council for Scientific and Technology Development (CNPq).

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Correspondence to Cleiton Magano Marques.

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Marques, C.M., Meinhardt, C. & Butzen, P.F. Soft Errors Sensitivity of SRAM Cells in Hold, Write, Read and Half-Selected Conditions. J Electron Test 37, 263–270 (2021). https://doi.org/10.1007/s10836-021-05944-2

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