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Aging Prediction and Tolerance for the SRAM Memory Cell and Sense Amplifier

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Abstract

Serious reliability concerns of Static Random Access Memories (SRAMs) in nanometer technologies are the increased process variations as well as the various aging mechanisms. Bias Temperature Instability (BTI) and Hot Carrier Injection (HCI) phenomena are the main factors related to the aging reliability reduction. This degradation affects speed, operating voltages, memory cell noise margins and sense amplifier input offset voltage. Thus, it is imperative to develop design techniques for aging tolerance that will provide the ability to sense aging levels, predict upcoming failures in the memory and early react to retain the reliable operation. In this work, a circuit for the periodic aging monitoring in SRAM sense amplifiers and memory cells is presented.

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Acknowledgments

This research has been co-funded by the General Secretariat for Research and Technology (GSRT) and the Hellenic Foundation for Research and Innovation (HFRI).

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Authors and Affiliations

  1. Department of Computer Science and Engineering, University of Ioannina, VCAS Lab, 45110, Ioannina, Greece

    Helen-Maria Dounavi, Yiorgos Sfikas & Yiorgos Tsiatouhas

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  1. Helen-Maria Dounavi
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  2. Yiorgos Sfikas
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  3. Yiorgos Tsiatouhas
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Correspondence to Helen-Maria Dounavi.

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Responsible Editor: V. Champac

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Dounavi, HM., Sfikas, Y. & Tsiatouhas, Y. Aging Prediction and Tolerance for the SRAM Memory Cell and Sense Amplifier. J Electron Test 37, 65–82 (2021). https://doi.org/10.1007/s10836-021-05932-6

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  • DOI: https://doi.org/10.1007/s10836-021-05932-6

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