Design of EMI and suppression structure based on bar-via☆
Introduction
AT present, the vertical through-via interconnection technology, such as through silicon/glass/molding vias (TSV/TGV/TMV), not only reduces the footprint of the multi-chip module substrate, but also shortens the global inter-chip wiring length, which may effectively reduce the impact of interconnection latency and loss on signaling performance, and has become the key to the high-speed inter-chip interconnection. Showing the potential of enhancing the performance of 2.5-dimensionally (2.5D) and three-dimensionally (3D) integrated modules, increasing their integration density, and reducing their dimensions, vertical through-vias and their arrays inevitably introduce electromagnetic (EM) coupling and even radiation interference (EMI) in the highly populated substrate space [1,2]. In recent years, as data exchange protocols with higher and higher transmission rate are demanded by 2.5D and 3D integrated modules to support the continuously evolution of high performance computation and implementation of rebooting computation models like edge computing, neuromorphic computing and machine learning, aside from electromagnetics coupling issues, EMI problem has attracted wide interests from researchers and engineers engaged in signal integrity (SI), power integrity (PI) and electromagnetic compatibility problem.
The SI and PI problems are tightly intertwined with electromagnetic interference. Even if the crosstalk and noise amplitude do not exceed the SI or PI tolerance, they can still produce significant electromagnetic interference radiation. Therefore, measures to track the root cause of SI and PI problems and corresponding countermeasures are also helpful in handling EMI problems. Nowadays, some measures commonly used to suppress electromagnetic radiation interference between through vias include adding an isolation guard ring [3], expanding the signal line spacing, tuning the substrate doping concentration [4], using new materials [5] and metamaterials [6], adopting new TSV structures or their combinations [7], inserting a cage structure formed by grounded TSV [8], and so on. These methods can suppress EMI to a certain extent, but still show great deficiencies in the application of 2.5D to 3D integration scenarios. For example, the isolation guard ring is not effective for the multilayer substrate stack structure; expanding the signal line spacing will increase the footprint overhead of the substrate; the risks in introducing a new material and associated process steps are always high, and there are certain difficulties in processing and testing.
Therefore, in this paper, a 6G-B-TSV circular cage electromagnetic shielding structure is proposed for the 2.5D silicon interposers, which is composed of 6 ground bar TSVs evenly distributed around the signal TSV. Although this structure decreases the available space for the traces/interconnections layout, compared with the simulation results of the unshielded structure and the traditional cylindrical TSV (C-TSV) shielded structure, the superiority of the shielded structure proposed in this paper is verified in terms of shielding effectiveness. At the same time, based on the design of the 6G-B-TSV structure, a similar 6G-B-Via shielding structure and a fence structure consisting of single-row grounded B-Vias are proposed for the purpose of electromagnetic interference suppression and isolation between the two cross-layer signal microstrip line channels with through vias on the organic substrate. On this basis, a design of B-Via fence placing on the edge of the substrate is further proposed to suppress edge radiation. The effectiveness of the proposed structure designs in electromagnetic shielding and edge radiation suppression is verified by modeling and simulation. Finally, test samples are made on the printed circuit board (PCB), and the actual measurement results show that the circular shield cage and the shield fence structure design can effectively suppress electromagnetic interference and reduce the adverse effects of other channels on the signal path concerned.
Section snippets
Bar-via
Bar TSV (B-TSV), consisting of two sliced semi-cylinders and a cuboid placed co-axially, is a modified through silicon via configuration proposed by one of the authors in Ref. [9]. Fig. 1 displays a cross-sectional view of a bar TSV, and Fig. 2 shows a 3D structure of a bar TSV, where the radius of the semicircle is and the lengths of the two sides of the rectangle are and , respectively. This novel structure can increase the conductor metal (Cu) population density of a TSV array.
Design of 6G-B-TSV circular cage shield structure
Inserting grounded TSVs into the substrate is one of the methods of EMI suppression. All TSVs in the grounded TSV array are often evenly spaced, which can connect the network ground layers on different models together to form a 3D electromagnetic shielding structure. On the one hand, the grounded TSV array can provide a good return path for the signal TSV and effectively reduce the electromagnetic interference caused by the bad return path. On the other hand, the grounded TSV array can absorb
Design and simulation analysis of bar-via shield structure
In order to meet the requirements of electromagnetic interference suppression and isolation between the two cross-layer signal microstrip line channels with through vias on the organic interposer, a 6G-B-via circular cage shielding structure similar to the 6G-B-TSV structure is designed in this paper. Simultaneously, a shielded fence structure consisting of a single-row grounded B-Via array is proposed. In order to compare and analyze the electromagnetic interference suppression effect of the
Sample production and test analysis
In order to further verify the shielding effectiveness of the electromagnetic shielding and edge radiation suppression structure designed in this paper, the test samples are designed and manufactured. From the perspective of electromagnetics, the through-via on the printed circuit board (PCB) and TSV are similar in working principle, so it can effectively explain and verify the relevant characteristics of TSV. Considering some factors such as expensive processing cost and ultra-long
Conclusion
In this paper, a 6G-B-TSV circular cage electromagnetic shielding structure is proposed on the silicon interposer, and it is modeled and simulated together with the traditional cylindrical grounded TSV cage shielding structure and the unshielded GSSG-TSV structure. The simulation results show that the proposed shielding structure can better suppress the electromagnetic interference between signal TSVs. At the same time, this paper proposes a 6G-B-Via circular cage shield structure and a
Declaration of competing interest
The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper.
Acknowledgment
The authors thank the assistance other members of our team, such as Dr. Zhensong Li, and Jingjing Li, who laid the initial foundation for the research of this paper and provided some advices.
Na Li was born in Baoding, Hebei province, China in 1993. She received the B.S. degree in electronic information engineering from Henan Polytechnic University, Jiaozuo, China, in 2017 and the M.S. degree in electronic and communication engineering from Beijing Information Science and Technology University, Beijing, China, in 2020. From 2013 to 2017, she studied at Henan Polytechnic University. From 2017 to 2020, she was a graduate student at Beijing Information Science and Technology
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Na Li was born in Baoding, Hebei province, China in 1993. She received the B.S. degree in electronic information engineering from Henan Polytechnic University, Jiaozuo, China, in 2017 and the M.S. degree in electronic and communication engineering from Beijing Information Science and Technology University, Beijing, China, in 2020. From 2013 to 2017, she studied at Henan Polytechnic University. From 2017 to 2020, she was a graduate student at Beijing Information Science and Technology University. Her research direction is three-dimensional integrated circuits.
Min Miao received the Ph.D. degree from the Institute of Micro/Nanoelectronics, Peking University, Beijing, China, in 2004. He is currently a Professor of Electronic and Information Engineering with Beijing Information Science and Technology University, Beijing. His current research interests include signal and power integrity, electromagnetic compatibility issue, EDA tools, novel computation models and architectures, for micro/nano devices and corresponding heterogeneously integrated modules. Prof. Miao is now a senior member of IEEE and the Secretary-in-general of IEEE Electronic Packaging Society, Beijing Section. He is a recipient of awards for excellence in research and engineering practices in TSV and 3D system-in-package domains by Beijing Municipal Government (2016) and well-known organizations in China.
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This work is co-funded by the National Natural Science Foundation of China (No. 61674016), National Basic Research Program of China (No. 2015CB057201), and Beijing Nova Program Interdisciplinary Studies Cooperative Projects (No. Z191100001119013), China.