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Design of low power single-stage bias current control technique- based DVGA for LTE receivers

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Abstract

In this study, a novel single-stage Digital Variable Gain Amplifier architecture (DVGA) was presented for Long Time Evolution (LTE) receivers. The proposed DVGA combines two transimpedance amplifiers, a transconductance amplifier and a novel digitally controlled current. Using a digital control block, an auxiliary pair to retain a constant current density enabled changing the gain. The Heuristic Method was used to optimize the proposed circuit performance for a high gain, low noise and low power consumption. This circuit was simulated using device-level description of TSMC 0.18 µm CMOS process. The VGA achieved 59 dB gain control range, 171 MHz bandwidth, 11.5 dBm third-order input-intercept point as a minimum gain and below 19 dB noise figure as a maximum gain which makes it convenient for LTE receivers. For maximum gain, The Total Harmonic Distortion (THD) is less than -62 dB. The fully differential VGA has a low THD which it represents a key performance satisfying the LTE system application requirements. The overall power consumption of the circuit is 0.35 mW for ± 0.9 V power supply. This paper also dealt with the prediction of optimized DVGA performances for the upcoming CMOS nanoprocess using the robust Bisquare Weights (BW) method for 16 to 10 nm process nodes. The behavior of the optimized DVGA performances with process scaling was detailed.

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References

  1. Rodriguez, S., Rusu, A. & Ismail, M. WiMAX/LTE receiver front-end in 90 nm CMOS. IEEE International Symposium on Circuits and Systems (ISCAS), 2009.

  2. Jeon, O., Fox, R. M., & Myers, B. A. (2006). Analog AGC circuitry for a CMOS WLAN receiver. IEEE Journal of Solid-State Circuits, 41, 2291–2300.

    Article  Google Scholar 

  3. Ergen, M. (2009). Mobile Broadband: Including WiMAX and LTE. New York: Springer.

    Book  Google Scholar 

  4. Han, D. O., Kim, J. H., & Park, S. G. (2010). A dual band CMOS receiver with hybrid down conversion mixer for IEEE 802.11a/b/g/n WLAN applications. IEEE Microwave Wireless Components Letter., 20, 235–237.

    Article  Google Scholar 

  5. Onet, R., Neag, M., Kovács, I., Topa, M., Rodriguez, S., & Rusu, A. (2014). Compact variable gain amplifier for a multistandard WLAN/WiMAX/LTE receiver. IEEE Transactions on Circuits and Systems., 61,pp. 247–257.

    Article  Google Scholar 

  6. 3GPP TR 25.913, V8.0.0, Requirements for evolved UTRA (E-UTRA) and evolved UTRAN (E-UTRAN).http://www.3gpp.org/about-3gpp, 2008.

  7. Elwan, H. O., Tarim, B., & Ismail, M. (1998). A digitally controlled dB linear CMOS AGC for mixed-signal application. IEEE Circuits & Devices Magazine, 8, 11.

    Google Scholar 

  8. Elwan, H., Adawi, A., Ismail, M., Olsson, H., & Soliman, A. (1999). Digitally controlled dB-Linear CMOS variable gain amplifier”. Electronics Letters, 35, 1725–1727.

    Article  Google Scholar 

  9. Chen, Z., Zheng, Y., Choong, F. C., & Je, M. (2012). A low power variable-gain amplifier with improved linearity: Analysis and design. IEEE Transactions on Circuits and Systems I: Regular Papers., 59, 2176–2185.

    Article  MathSciNet  Google Scholar 

  10. Lahiani, S., Ben Selem, S., Daoud, H., & Loulou, M. (2018). A CMOS low-power digital variable gain amplifer design for a cognitive radio receiver application for IEEE 802.22 standard. Journal of Circuits, Systems, and Computers, 27(9), 1850135.

    Article  Google Scholar 

  11. Lahiani, S., Ben Salem, S. & Loulou, M (2018). Low power digital variable gain amplifier design for WiMAX/LTE receiver. Proceedings of the 30th international conference on microelectronics.

  12. Daoud, H., Lahiani, S., Ben Selem, S., & Loulou, M. (2019). Efficient recursive least squares parameter estimation algorithm for accurate nanoCMOS variable gain amplifier performances. International Journal of Electronics, 107(4), 659–682.

    Article  Google Scholar 

  13. Daoud, H., Ben Selem, S., & Loulou, M (2011) NanoCMOS folded cascode OTA performances prediction through least-square method. Proceedings of the 9th international new circuits and system conference. 337–340.

  14. Giannini, V., Nuzzo, P., Soens, C., Vengattaramane, K., Ryckaert, J., Goffioul, M., et al. (2009). A 2-mm2 0.1–5 GHz software-defined radio receiver in 45-nm digital CMOS”. IEEE Journal Solid-State Circuits, 44, 3486–3498.

    Article  Google Scholar 

  15. Gungordu, A. D., & Tarim, N. (2018). Design of a constant-bandwidth variable-gain amplifier for LTE receivers. Analog Integrated Circuits Signal Processing , 97(1), 27–38.

    Article  Google Scholar 

  16. Geis, A., Ryckaert, J., Vandersteen, G., & Rolain, Y. (2010). A 0.5mm power scalable 0.5–3.8 GHz CMOS DT-SDR receiver with 2nd order RF band-pass sampler”. IEEE Journal Solid-State Circuits, 45, 2375–2387.

    Google Scholar 

  17. Wang, J., & Zhu, Z. (2016). An improved-linearity, single-stage variable-gain amplifier using current squarer for wider gain range. Circuits System and Signal Processing., 35, 4550–4566.

    Article  MathSciNet  Google Scholar 

  18. Lahiani, S., Daoud, H., Ben Salem, S., & Loulou, M. (2019). Low power CMOS variable gain amplifier design for a multistandard receiver WLAN/WIMAX/LTE. Analog Integrated Circuits and Signal Processing, 101(2), 255–265.

    Article  Google Scholar 

  19. Lahiani, S., Daoud, H., Ben Salem, S., & Loulou, M. (2017). “Low voltage low power folded cascode OTA design for RF applications. International Journal of Applied Engineering Research, 12, 4029–4032.

    Google Scholar 

  20. Fakhfakh, M., Cooren, Y., Sallem, A., Loulou, M., & Siarry, P. (2010). Analog circuit design optimization through the particle swarm optimization technique. Analog Integrated Circuit Signal Processing., 63, 71–82.

    Article  Google Scholar 

  21. Fakhfakh, M., Loulou, M., & Masmoudi, N. (2007). Optimizing performances of switched current memory cells through a heuristic. Journal of Analog Integrated Circuits ad Signal Processing., 50, 115–126.

    Article  Google Scholar 

  22. Ben Salem, S., Fakhfakh, M., Loulou, M., Loumeau, P., & Masmoudi, N. (2006). A high performances CMOS CCII and high frequency applications. Analog Integrated Circuit Signal Processing Springer, 49, 71–78.

    Article  Google Scholar 

  23. Lahiani, S., Ben Selem, S., Daoud, H., & Loulou, M. (2017). dB-linear variable gain amplifier design in 0.18 μm process with optimization. Asian Journal of Applied Sciences., 10, 151–158.

    Article  Google Scholar 

  24. Daoud, H., Ben Selem, S., Lahiani, S., Ben Selem, C., & Loulou, M. (2018). NanoCMOS optimized dvcc-based quadrature voltage controlled oscillator performances prediction through bisquare-weights method. Analog Integrated Circuit Signal Processing Springer, 100(3), 547–563.

    Article  Google Scholar 

  25. http://www.itrs.net

  26. http://www.mosis.com.

  27. Cao, Y. (2011). Predictive technology model for robust nanoelectronic design. New York: Springer.

    Book  Google Scholar 

  28. Balakrishnan, N., Chimitova, E., Galanova, N., & Vedernikova, M. (2013). Testing goodness of fit of parametric aft and ph models with residuals . Communication in Statistics-Simulation and Computation , 42, 1352–1367.

    Article  Google Scholar 

  29. Kumar, T., & MA, K., & YEO, K, . (2013). Temperature-compensated dB-linear digitally controlled variable gain amplifier with DC offset cancellation. IEEE Transactionson Microwave Theory and Techniques., 61, 2648–2661.

    Article  Google Scholar 

  30. Young Kang, S., TakRyu, S., & Soon Park, C. (2012). A precise decibel-linear programmable gain amplifier using a constant current-density function. IEEE Transactions on Microwave Theory and Techniques, 60, 2843–2850.

    Article  Google Scholar 

  31. Liu, H., Zhu, X., Boon, C. C., & He, X. F. (2015). Cell-based variable-gain amplifiers with accurate dB-linear characteristic in CMOS 0.18 μm technology”. IEEE Journal of Solid-State Circuits, 50, 586–596.

    Article  Google Scholar 

  32. Baghtash, H. F., & Ayatollahi, A. (2014). Zero-pole, reposition based, 0.95-mW, 68-dB, linear-in-dB, constant bandwidth variable gain amplifier. Circuits System and Signal Processing., 33, 1353–1368.

    Article  Google Scholar 

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Authors and Affiliations

  1. Laboratory of Electronics and Technologies of Information (LETI), University of Sfax, National School of Engineers of Sfax, Sfax, Tunisia

    Sawssen Lahiani, Houda Daoud, Samir Ben Salem, Rahma Aloulou & Mourad Loulou

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  1. Sawssen Lahiani
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  2. Houda Daoud
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  3. Samir Ben Salem
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  4. Rahma Aloulou
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  5. Mourad Loulou
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Correspondence to Sawssen Lahiani.

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Lahiani, S., Daoud, H., Ben Salem, S. et al. Design of low power single-stage bias current control technique- based DVGA for LTE receivers. Analog Integr Circ Sig Process 107, 529–542 (2021). https://doi.org/10.1007/s10470-020-01758-y

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  • DOI: https://doi.org/10.1007/s10470-020-01758-y

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