Disposable C_Spacer flow for building MIM capacitors

Highlights

• We propose an innovative Disposable Carbon Spacer flow to build MIM capacitors

• The Disposable Carbon Spacer flow allows to save four process steps

• The flow is based on disposable Carbon spacers deposition nested in the etch process

• The in situ carbon spacer deposition is controllable and repeatable

• The flow is advantageous for the following steps and electrical performances

Abstract

In this paper we will describe an innovative process flow to build a MIM capacitor, allowing to save several process steps but accounting for all the morphological requirements. The suggested flow is based on the deposition of a sacrificial layer during the top electrode patterning in a dry etching tool. This C-rich film is employed to form disposable spacers, which are requested to reduce the risk of electrical leakage. We will show how the film is deposited and controlled and the benefits given by the suggested sequence.

Introduction

Modern dry etching equipment are very versatile tools, among other factors because the ability to disentangle plasma generation and ion bombardment and because the huge availability of process gases. In some extreme cases, instead of removing materials from the wafers, they can also be forced to deposit layers. This possibility is useful for many applications, such as to improve the process repeatability, coating the etching chambers with a fresh sacrificial layer before processing each wafer (Singh et al. 2004 [1]), or to reduce production costs, avoiding dedicated layer depositions. In this paper we will show how a dry etching tool can be used to in-situ deposit a disposable layer during the patterning of a MIM (Metal-Insulator-Metal) capacitor, allowing to save several dedicated process steps.

Capacitors are useful passive elements in various analog applications: in these circuits, they can be used for DC isolation, coupling/decoupling and bypass. The possibility to guarantee high capacitance and low leakage is becoming more and more challenging, as the dimensions of devices shrink. Traditional MOS capacitors (Metal-Oxide-Semiconductor) performances has progressively become unsatisfactory and were replaced by MIM, Metal-Insulator-Metal capacitors, parallel plate capacitors with metal electrodes (Ng et al. 2005 [2], Lisiansky et al. 2014 [3]). An important advantage of MIM capacitors is that they can be built on any substrate, because their electric field distributions are confined within the dielectric layer and their capacitance is therefore independent on substrate. As a consequence, MIM capacitors can be plug and play modules that can be inserted in the process flow of microelectronic devices (Farcy et al. 2008 [4]). To have the smallest impact on the rest of the device, they must be contacted through vias, landing on top and bottom electrodes. The first process requirement, therefore, is that top and bottom electrodes can't be self-aligned: bottom electrodes must be wider to guarantee landing area for vias. As a consequence, they must be defined by two different etch processes. Moreover, since risks of electrical leakage between top and bottom electrodes must be minimized, the second requirement is that the dielectric layer must not be self-aligned to top electrode, to increase the leakage path. The third process requirement arises because of manufacturing constrains. To increase MIM capacitance density, in fact, high-k materials are often employed (Jeannot et al. 2007 [5], Perng et al. 2004 [6]). In this case, if the dielectric layer is self-aligned to the bottom electrode, subsequent via etch will land on a high-k material, leading to dangerous metallic contaminations of the dielectric etching tool, commonly used for vias patterning. These kind of contaminations are not easily removed from these equipment family and will cause undesired performance degradation. The dielectric layer, therefore, must not be self-aligned nor to top neither to bottom electrodes. To satisfy these requirements a dielectric spacer sequence is needed (Shields et al. 2002 [7]).

In this work we will compare a dielectric spacer process flow to build a high-k MIM module to an innovative, simpler solution, based on disposable C spacers deposited on dry etching tools. Disposable Carbon spacers have already been used for different purposes, such as Self-Aligned Double Patterning (Bencher et al. 2008 [8], Jung et al. 2007 [9]) and have also been suggested for self-aligned implants (Brown et al. 2003 [10]), but in this work we will show how they can be used to effectively build a desired morphological feature, by nesting a deposition inside a dry etch process.