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A novel switched capacitor-based multilevel inverter with symmetrical and asymmetrical configurations

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Abstract

In this paper, a novel single phase switched capacitor-based multilevel inverter topology is presented. The proposed topology is able to generate nine-level and 21-level output voltages for symmetric and asymmetric configuration of dc sources, respectively. The auxiliary H-bridge is not necessary to generate negative voltage levels, which reduces the voltage stress on the switches. The proposed switching scheme ensures the self-balancing of capacitors without any additional circuit. In order to generate the higher number of levels, two extended topologies are proposed with necessary mathematical expressions for various parameters. The effective comparison in terms of switches, diodes, capacitors, total standing voltage and cost function shows the advantages of proposed topology against recently developed topologies. The performance of the proposed topology is studied in MATLAB\Simulink platform and validated through the laboratory experimental tests. The performance of proposed topology for different frequencies, modulation indexes and load is studied, and corresponding results are presented.

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Abbreviations

MLI:

Multilevel inverter

NPC:

Neutral point clamped

FC:

Flying capacitor

CHB:

Cascaded H-bridge

SC:

Switched capacitor cell

MBV:

Maximum blocking voltage

TSV:

Total standing voltage

K:

Total number of switched capacitor cells/2

N:

Number of variables

Vo, max:

Maximum output voltage

M:

Total number of cascaded units

C.F:

Cost function

α :

Weight coefficient

fSW :

Switching frequency

fM :

Fundamental modulating frequency

Mi:

Modulation index

Vout:

Output voltage

Iout:

Output current

Vc1:

Voltage across capacitor C1

Vc2:

Voltage across capacitor C2

Lev:

Levels

Swi:

Switches

Cap:

Capacitors

Dio:

Diodes

SC:

Switched capacitor cells of proposed topology

Aux:

Auxiliary switches of proposed topology

Et:

Proposed extended topology

CAS:

Proposed cascaded structure

References

  1. Bana PR, Panda KP, Naayagi RT, Siano P, Panda G (2019) Recently developed reduced switch multilevel inverter for renewable energy integration and drives application: topologies, comprehensive analysis and comparative evaluation. IEEE Access 7:54888–54909

    Article  Google Scholar 

  2. Guisso RA, Andrade AMSS, Hey HL, Da Martins MLS (2019) Grid-tied single source quasi-Z-source cascaded multilevel inverter for PV applications. Electron Lett 55(6):342–343

    Article  Google Scholar 

  3. Du Z, Ozpineci B, Tolbert LM, Chiasson JN (2009) DC-AC cascaded H-bridge multilevel boost inverter with no inductors for electric/hybrid electric vehicle applications. IEEE Trans Ind Appl 45(3):963–970

    Article  Google Scholar 

  4. Sheir A, Youssef MZ, Orabi M (2019) A novel bidirectional T-type multilevel inverter for electric vehicle applications. IEEE Trans Power Electron 34(7):6648–6658

    Article  Google Scholar 

  5. Dhananjaya M, Pattnaik S (2019) Design and implementation of a SIMO DC–DC converter. IET Power Electron 12(8):1868–1879

    Article  Google Scholar 

  6. Singh V, Gupta S, Pattnaik S, Tyagi M (2016) A new hybrid topology for multilevel inverter for power quality improvement, 2015 IEEE Power, Commun Inf Technol Conf PCITC 2015-Proc, pp. 628–634

  7. Sadanala C, Pattnaik S, Singh VP (2020) Fault tolerant architecture of an efficient five-level multilevel inverter with overload capability characteristics. IET Power Electronics 13(2):368–376. https://doi.org/10.1049/ietpel.2019.0736

    Article  Google Scholar 

  8. Maurya S, Mishra D, Singh K, Mishra AK, Pandey Y (2019) An efficient technique to reduce total harmonics distortion in cascaded H-bridge multilevel inverter. Proc 2019 3rd IEEE Int Conf Electr Comput Commun Technol ICECCT, pp. 1–5, 2019

  9. Stala R (2013) A natural DC-link voltage balancing of diode-clamped inverters in parallel systems. IEEE Trans Ind Electron 60(11):5008–5018

    Article  Google Scholar 

  10. Amini J, Viki AH, Radan A, Moallem M (2016) A general active capacitor voltage regulating method for L-level M-cell N-phase flying capacitor multilevel inverter with arbitrary dc voltage distribution. IEEE Trans Ind Electron 63(5):2659–2668

    Article  Google Scholar 

  11. Mariethoz S (2013) Systematic design of high-performance hybrid cascaded multilevel inverters with active voltage balance and minimum switching losses. IEEE Trans Power Electron 28(7):3100–3113

    Article  Google Scholar 

  12. Babaei E, Hosseini SH (2009) New cascaded multilevel inverter topology with minimum number of switches. Energy Convers Manag 50(11):2761–2767

    Article  Google Scholar 

  13. Babaei E, Kangarlu MF, Sabahi M (2014) Extended multilevel converters: an attempt to reduce the number of independent DC voltage sources in cascaded multilevel converters. IET Power Electron 7(1):157–166

    Article  Google Scholar 

  14. Samadaei E, Sheikholeslami A, Gholamian SA, Adabi J (2018) A square T-type (ST-type) module for asymmetrical multilevel inverters. IEEE Trans Power Electron 33(2):987–996

    Article  Google Scholar 

  15. Ali JSM et al (2018) A new generalized multilevel converter topology based on cascaded connection of basic units. IEEE J Emerg Sel Top Power Electron 4:2498–2512

    Google Scholar 

  16. Kim K, Lee Y, Jang Y, Han J, Moon GW (2019) Hybrid switched-capacitor multi-level inverter for renewable energy systems, 2019 10th international conference on power electronics and ECCE Asia (ICPE 2019-ECCE Asia), Busan, Korea (South) 1–6

  17. Roy T, Majhee S, Chakraborty A, Dasgupta A (2019) A novel step-up multilevel inverter based on switched-capacitor technique for renewable energy conversion system. IEEE Int Conf Sustain Energy Technol Syst ICSETS 2019:97–102

    Google Scholar 

  18. Ye Y, Cheng KWE, Liu J, Ding K (2014) A step-up switched-capacitor multilevel inverter with self-voltage balancing. IEEE Trans Ind Electron 61(12):6672–6680

    Article  Google Scholar 

  19. Gautam SP, Sahu LK, Gupta S (2016) Reduction in number of devices for symmetrical and asymmetrical multilevel inverters. IET Power Electron 9(4):698–709. https://doi.org/10.1049/iet-pel.2015.0176

    Article  Google Scholar 

  20. Raman SR, Fong YC, Ye Y, Cheng KWE (2019) Family of Multiport switched-capacitor multilevel inverters for high-frequency AC power distribution. IEEE Trans Power Electron 34(5):4407–4422

    Article  Google Scholar 

  21. Sandeep N, Ali JSM, Yaragatti UR, Vijayakumar K (2019) Switched-capacitor-based quadruple-boost nine-level inverter. IEEE Trans Power Electron 34(8):7147–7150

    Article  Google Scholar 

  22. Liu J, Lin W, Wu J, Zeng J (2019) A novel nine-level quadruple boost inverter with inductive-load ability. IEEE Trans Power Electron 34(5):4014–4018

    Article  Google Scholar 

  23. Barzegarkhoo R, Moradzadeh M, Zamiri E, Madadi Kojabadi H, Blaabjerg F (2018) A new boost switched-capacitor multilevel converter with reduced circuit devices. IEEE Trans Power Electron 33(8):6738–6754

    Article  Google Scholar 

  24. Vahedi H, Al-Haddad K (2016) PUC5 inverter-A promising topology for single-phase and three-phase applications. IECON Proc Industrial Electron Conf, pp. 6522–6527

  25. Metri J, Vahedi H, Kanaan HY, Al-Haddad K (2016) Model predictive control for the packed U-Cells 7-level grid connected inverter. Proc IEEE Int Conf. Ind Technol 2016:1214–1219

    Google Scholar 

  26. Barzegarkhoo R, Kojabadi HM, Zamiry E, Vosoughi N, Chang L (2016) Generalized structure for a single phase switched-capacitor multilevel inverter using a new multiple DC link producer with reduced number of switches. IEEE Trans Power Electron 31(8):5604–5617

    Article  Google Scholar 

  27. Samadaei E, Kaviani M, Bertilsson K (2019) A 13-levels module (K-Type) with two DC sources for multilevel inverters. IEEE Trans Ind Electron 66(7):5186–5196

    Article  Google Scholar 

  28. Alishah RS, Hosseini SH, Babaei E, Sabahi M, Gharehpetian GB (2017) New high step-up multilevel converter topology with self-voltage balancing ability and its optimization analysis. IEEE Trans Ind Electron 64(9):7060–7070

    Article  Google Scholar 

  29. Gautam SP, Sahu LK, Gupta S (2018) Single-phase multilevel inverter topologies with self-voltage balancing capabilities. IET Power Electron 11(5):844–855

    Article  Google Scholar 

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Authors and Affiliations

  1. Department of Electrical Engineering, National Institute of Technology Raipur, Raipur, India

    Chiranjeevi Sadanala & Swapnajit Pattnaik

  2. Department of Electrical Engineering, Malviya National Institute of Technology Jaipur, Jaipur, India

    Vinay Pratap Singh

Authors
  1. Chiranjeevi Sadanala
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  2. Swapnajit Pattnaik
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  3. Vinay Pratap Singh
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Correspondence to Chiranjeevi Sadanala.

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Sadanala, C., Pattnaik, S. & Singh, V.P. A novel switched capacitor-based multilevel inverter with symmetrical and asymmetrical configurations. Electr Eng 103, 1461–1472 (2021). https://doi.org/10.1007/s00202-020-01172-7

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  • DOI: https://doi.org/10.1007/s00202-020-01172-7

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