Low-power current reference with temperature compensation by subthreshold leakage current

doi:10.1016/j.mejo.2020.104936

Microelectronics Journal

Volume 109, March 2021, 104936

https://doi.org/10.1016/j.mejo.2020.104936 Get rights and content

Abstract

A compact and power-efficient current reference with curvature-correction temperature characteristics is presented. Introducing of PTAT current into the loop of CTAT current generator results in reduced TC of V_GS, which makes the aspect ratios of MOSFETs decrease when perform the first-order temperature compensation. Application of the subthreshold leakage current with curvature temperature feature to the reference current improves the temperature stability of output current to 52.1 ppm/°C over temperature range of −30 to 120 °C. This reference implemented in a 180 nm process with core area of 0.08 mm² can work in a wide voltage range from 1.0 V to 2.4 V and consume current about 1 μA at 1.2 V.

Introduction

With increasing concern of people about portable products, wearable devices gradually prevail in daily life, which provides facilities for the prevalence of biomedical devices. As one of the essential blocks in these devices, current reference with high stability against temperature and supply voltage variation over wide range is preferred. Additionally, operating with low power dissipation is appreciated for extending the working time. Many research activities have been carried out on high-performance current references with low-voltage and low-power operation [[1], [2], [3], [4]]. Some works pay more attention to ultralow-power dissipation design [1, 2] at the cost of degraded temperature stability. On the opposite, the design in [3] focuses on the temperature stability rather than ultralow-power operation. An alternative way of implementing current reference is by combining current source of proportional-to-absolute temperature (PTAT) characteristics with that of complementary-to-absolute temperature (CTAT) features [4], where a simple architecture is presented as well as the first-order temperature coefficient (TC) of resistor has been taken into account. However, the second-order TC of resistor is no less or even larger than the first-order TC of it when the circuit operates in an environment with temperature higher than 100 °C. In this letter, a compact and power-efficient current reference with curvature correction for biomedical armamentarium is presented, where the second-order TC is countered with subthreshold leakage current in MOSFETs.

Section snippets

Circuit design

Fig. 1 presents the most ordinary current reference which is composed of typical PTAT and CTAT current source. Given the second-order TC of resistor, each current in terms of temperature can be expanded with Taylor formula as [5] $I_{P T A T} = \frac{A T_{0}}{R_{1} |_{T_{0}}} [1 + (\frac{1}{T_{0}} - α_{1}) Δ T + (α_{1}^{2} - α_{2} - \frac{α_{1}}{T_{0}}) Δ T^{2}]$ and $I_{C T A T} = B \frac{V_{G S_{M N 3}} |_{T_{0}}}{R_{2} |_{T_{0}}} [1 + (α_{V_{G S}} - α_{1}) Δ T + (α_{1}^{2} - α_{2} - α_{V_{G S}} \cdot α_{1}) Δ T^{2}]$ respectively, in which A = (k/q) · [(W_MP3/L_MP3)/(W_MP1/L_MP1)] · ln[(W_MP2/L_MP2)/(W_MP1/L_MP1)], B = (W_MP6/L_MP6)/(W_MP4/L_MP4), ΔT = T – T₀, T₀ is the room temperature, R_x|

Experiment results

The current reference proposed in this letter has been implemented under a 0.18-μm standard CMOS process with the microphotograph shown in Fig. 5. Poly-resistors with high resistivity is employed for area saving.

The impact of process variation on the performance of current is shown in Fig. 6. An obvious increase/decrease of current is observed at temperature of higher than 70 °C under fast (FF)/slow (SS) corner, which is significantly mitigated after trimming. The reason can be found in the

Conclusion

A compact and power-efficient current reference with wide working supply range is presented. By introducing PTAT current into the loop of CTAT current generator, the TC of V_GS can be reduced, which decreases the aspect ratios of MOSFETs when the first-order temperature compensation is accomplished. The curvature-correction temperature feature is obtained by applying the subthreshold leakage current in the reference output, which improves the TC of output current to 52.1 ppm/°C over temperature

CRediT authorship contribution statement

Zhentao Xu: Conceptualization, Methodology, Software, Validation, Formal analysis, Investigation, Writing - original draft, Data curation. Zhi Lin: Resources, Writing - review & editing, Visualization.

Declaration of competing interest

The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper.

Acknowledgements

This work was supported by the National Natural Science Foundation of China under Grant62074020.

References (7)

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A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilities
Myungjoon Choi et al.
A 23pW, 780ppm/°C resistor-less current reference using subthreshold MOSFETs
Junghyup Lee et al.
A 1.4-μW 24.9-ppm/°C current reference with process-insensitive temperature compensation in 0.18-μm CMOS
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A 250pA, Gate-Leakage Based Trimming Free Current Reference, from -55°C to 150°C for Lower Power IoT Applications
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