Abstract
With the rapid development of 5G network and Internet of Things, Clustered Look-Ahead (CLA) technique becomes a promising approach to further accelerate recursive digital filters for real-time applications, such as smart robots and automatic driving. However, it is not easy to quickly obtain a stable CLA pipelined VLSI (Very Large Scale Integration) architecture using the existing methods. This paper proposes a CLA Formula to accelerate the VLSI architecture design procedure through rigorous and complete mathematical derivation. Comparing the proposed method with the symbolic approach, experiments reveal that more than half of the software coding time can be saved for the designers, and the execution time of the programs can also be reduced by 168 to 30243 times with the number of pipelined stages ranging from 6 to 96.
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This work was supported in part by the National Nature Science Foundation of China under Grant 61376075 and Grant 41412020201 and in part by the key Research and Development Program of Jiangsu Province under Grant BE2015153.
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Zheng, M., Luo, Y., Pan, H. et al. CLA Formula and its Acceleration of Architecture Design for Clustered Look-Ahead Pipelined Recursive Digital Filter. J Sign Process Syst 93, 617–629 (2021). https://doi.org/10.1007/s11265-020-01607-1
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DOI: https://doi.org/10.1007/s11265-020-01607-1