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Mixed CNT bundles as VLSI interconnects for nanoscale technology nodes

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Abstract

The continuous miniaturization of very large-scale integration devices impacts the performance of integrated circuits. The performance of existing interconnect materials such as copper has become saturated beyond the deep-submicron technology node, motivating the search for new interconnect materials that could be efficiently employed in such circuits. In this study, a temperature-dependent analysis is performed to determine the propagation delay, power dissipation, and power–delay product of copper, single-walled carbon nanotubes (SWCNTs), multiwalled carbon nanotubes (MWCNTs), double-walled carbon nanotubes (DWCNTs), and mixed (multi- and double-wall) carbon nanotube bundle (MDCB) structures. The performance of these bundled structures is examined with the help of a complementary metal–oxide–semiconductor driver interconnect load system at various temperatures (200–500 K) and technology nodes (22 and 16 nm). The proposed novel mixed structure with MWCNTs at the periphery and DWCNTs in the center is interesting due to the combination of the excellent conducting properties of DWCNTs and the reduction of the net capacitive coupling due to the MWCNTs. Indeed, it is observed that this MDCB interconnect structure can outperform not only copper interconnects but also the SWCNT, MWCNT, and DWCNT structures. Such mixed structures could be used as interconnect materials in high-speed integrated circuits at future nanotechnology nodes.

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  1. Thapar Institute of Engineering and Technology, Patiala, India

    Gurleen Dhillon & Karmjit Singh Sandha

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  1. Gurleen Dhillon
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  2. Karmjit Singh Sandha
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Correspondence to Karmjit Singh Sandha.

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Dhillon, G., Sandha, K.S. Mixed CNT bundles as VLSI interconnects for nanoscale technology nodes. J Comput Electron 20, 248–258 (2021). https://doi.org/10.1007/s10825-020-01585-4

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