Abstract
Recent advances in nanotechnology have led to the emergence of energy efficient circuit technologies like spintronics and domain wall magnets that use Majority gates as their primary logic elements. For logic synthesis methods targeted to such technologies to be effective and efficient, they need to be able to use, manipulate, and exploit large Majority terms in their synthesis flow. One of the problems that turn up in such an endeavor is the determination of equivalence of two n-input Majority terms. As Majority gates implement more complex Boolean functions than traditional AND/OR gates, this is a non-trivial problem—one that demands to be solved before proceeding to harder problems dealing with networks of Majority gates. We provide an algorithm based on prime implicants as a solution to this problem. In addition, we provide an algorithm that compacts an n-input Majority term to an equivalent n-input Majority term that has the fewest number of inputs. In this quest, we extend the concept of implicants to two cases — 1-implicants and prime 1-implicants that imply that a function evaluates to ‘1’, and 0-implicants and prime 0-implicants that imply that it evaluates to ‘0’. We exploit the properties of Majority to create an efficient algorithm to generate the sums of all prime 1-implicants and all prime 0-implicants of an n-input Majority term. As Majority and Threshold functions have been shown to be logically equivalent, our algorithms are applicable to Threshold functions as well. Being based on implicants of Majority, our algorithms improve on the known naive algorithms for equivalence checking and compaction for threshold logic terms.
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Devadoss, R., Paul, K. & Balakrishnan, M. Equivalence Checking and Compaction of n-input Majority Terms Using Implicants of Majority. J Electron Test 35, 679–694 (2019). https://doi.org/10.1007/s10836-019-05831-x
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DOI: https://doi.org/10.1007/s10836-019-05831-x