Abstract
The performance of a group III–V material quantum dot (QD) nanostructure memory is investigated using a self-consistent Schrödinger solver, eight-band k·p model, and carrier dynamics modelling. This model is used to explore the information loss due to the carrier emission rate in the QDs as a function of temperature, size and confinement potential. The results reveal the dominant emission mechanisms that should occur at different operating temperatures. To minimize the loss and improve the performance at room temperature, our findings reveal an increase in the carrier storage time and a reduction in the power dissipation with increasing dot size. It is further illustrated that electrons are advantageous as information carriers over holes and that the inclusion of high-bandgap barrier layers favours longer-duration data retention. The model is extended to include trap states in realistic QDs, whose effect is found to become more prominent with performance optimization. The computed results are in close agreement with other experimental data for different QDs along with barrier layer. This validates the efficacy of the model, which can be utilized as a design tool for fabricating nanoscale memories with better data retention capability.
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We acknowledge the management of Vellore Institute of Technology Chennai for providing financial support through seed funding. V.D. again acknowledges the management of Vellore Institute of Technology Chennai for providing his fellowship.
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Damodaran, V., Choudhury, K. & Ghosh, K. Modelling and simulation of carrier transport in quantum dot memory device for longer data retention and minimized power consumption. J Comput Electron 20, 178–194 (2021). https://doi.org/10.1007/s10825-020-01577-4
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DOI: https://doi.org/10.1007/s10825-020-01577-4