Abstract
An energy efficient switching algorithm for low voltage SAR ADC is presented. By the combination of MSB-split and merge-and-split techniques, this switching method consumes negative energy in the MSB bit switching, which contributes to 99.76% switching energy reduction comparing to the conventional solution. Furthermore, without requiring for a third reference voltage makes it especially suitable for ADC design under low supply voltage. Additionally, LSB-down technique is employed, which reduces the total capacitor DAC area by 50%. The simulated differential-nonlinearity and integrated-nonlinearity are 0.27 and 0.21LSB, respectively, demonstrating that the proposed switching algorithm has a relatively good linearity.
References
Hsieh, S., & Hsieh, C. (2019). A 0.4-V 13-bit 270-kS/s SAR-ISDM ADC with opamp-less time-domain integrator. IEEE Journal of Solid-State Circuits, 54(6), 1648–1656.
Liu, C., Chang, S., Huang, G., & Lin, Y. (2010). A 10-bit 50-MS/s SAR ADC with a monotonic capacitor switching procedure. IEEE Journal of Solid-State Circuits, 45(4), 731–740.
Zhu, Y., et al. (2010). A 10-bit 100-MS/s reference-free SAR ADC in 90 nm CMOS. IEEE Journal of Solid-State Circuits, 45(6), 1111–1121.
Yuan, C., & Lam, Y. (2012). Low-energy and area-efficient tri-level switching scheme for SAR ADC. Electronics Letters, 48(9), 482–483.
Zhu, Z., Xiao, Y., & Song, X. (2013). VCM-based monotonic capacitor switching scheme for SAR ADC. Electronics Letters, 49(5), 327–329.
Wang, H., et al. (2019). A capacitor-splitting switching scheme with low total power consumption for SAR ADCs. Journal of Circuits, Systems and Computers, 28(4), 1920002.
Lin, J., & Hsieh, C. (2015). A 0.3 V 10-bit 1.17 f SAR ADC with merge and split switching in 90 nm CMOS. IEEE Transactions on Circuits and Systems I Regular Papers, 62(1), 70–79.
Ginsburg, B. P., & Chandrakasan, A. P. (2005). An energy-efficient charge recycling approach for a SAR converter with capacitive DAC. In 2005 IEEE international symposium on circuits and systems (Vol. 181, pp. 184–187).
Baek, S. U., Lee, K. Y., & Lee, M. (2018). Energy-efficient switching scheme for SAR ADC using zero-energy dual capacitor switching. Analog Integrated Circuits and Signal Processing, 94(2), 317–322.
Zhang, J., & Zhu, Z. M. (2018). High energy-efficient partial floating capacitor array DAC scheme for SAR ADCs. Analog Integrated Circuits and Signal Processing, 94(1), 171–175.
Sun, L., Li, B., Wong, A. K. Y., Ng, W. T., & Pun, K. P. (2015). A charge recycling SAR ADC with a LSB-down switching scheme. IEEE Transactions on Circuits and Systems I: Regular Papers, 62(2), 356–365.
Rahimi, E., & Yavari, M. (2014). Energy-efficient high-accuracy switching method for SAR ADCs. Electronics Letters, 50(7), 499–501.
Kuo, C. H., & Hsieh, C. E. (2011). Floating capacitor switching SAR ADC. Electronics Letters, 47(13), 742–743.
Sanyal, A., & Sun, N. (2013). SAR ADC architecture with 98% reduction in switching energy over conventional scheme. Electronics Letters, 49(4), 248–250.
Zhang, H., Zhang, H., Sun, Q., Li, J., Liu, X., & Zhang, R. (2018). A 0.6-V 10-bit 200-kS/s SAR ADC with higher side-reset-and-set switching scheme and hybrid CAP-MOS DAC. IEEE Transactions on Circuits and Systems I: Regular Papers, 65(11), 3639–3650.
Chen, L., Sanyal, A., Ma, J., & Sun, N. (2014). A 24-µW 11-bit 1-MS/s SAR ADC with a bidirectional single-side switching technique. In IEEE European solid state circuits conference (ESSCIRC), ESSCIRC 2014-40th (pp. 219–222).
Ding, Z., Bai, W. B., & Zhu, Z. M. (2016). Trade-off between energy and linearity switching scheme for SAR ADC. Analog Integrated Circuits and Signal Processing, 86(1), 121–125.
Liou, C., & Hsieh, C. (2013). A 2.4-to-5.2 fJ/conversion-step 10b 0.5-to-4MS/s SAR ADC with charge-average switching DAC in 90 nm CMOS. In 2013 IEEE international solid-state circuits conference digest of technical papers (pp. 280–281).
Acknowledgements
This work was supported by the National Natural Science Foundation of China No. 61871118, the Fundamental Research Funds for the Central Universities No. 2242019k30037.
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Han, S., Zhang, L. & Wu, J. Energy efficient switching scheme based on MSB-split structure for SAR ADC. Analog Integr Circ Sig Process 105, 135–139 (2020). https://doi.org/10.1007/s10470-020-01696-9
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DOI: https://doi.org/10.1007/s10470-020-01696-9