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Least squares linear phase FIR filter design and its VLSI implementation

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Abstract

In this work we present least squares (LS) approach to design linear phase Finite Impulse Response (FIR) filter.  Since the design of FIR digital filters is non-analytic, we aim at ideal zero-phase magnitude response and minimize the weighted error in passband and stopbands. The problem of least squares can then be solved non-iteratively by solving system of linear equations. Solution of which yields impulse response that is both real and symmetric. Frequency response of the proposed LS FIR filter shows a flat passband, and higher stop-band attenuation than traditional window based FIR design and comparable attenuation with Parks–McClellan method of the same order. In addition we have implemented LS FIR filter on FPGA based VLSI architectures. Performance evaluation of proposed LS FIR design on VLSI architecture shows comparable throughput, area and power consumption compared to classical filter design approaches.

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Notes

  1. Throughout this paper DTFT is expressed as a function of \(e^{j\omega }\).

  2. Another benefit of XST is that it takes care for a multiplication with a constant, i.e. optimizes the multiplier. For example if a 10-bit filter coefficient is \((0000001010)_{b}\), the multiplier synthesized will be \(8 \times 4-bit\). Similar is the case with the signed coefficient \((1111110101)_{b}\).

  3. Device Code: XC7VX330T, Package: FFG1157, Speed: -2

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Correspondence to Mansoor Khan.

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Khan, M., Agha, S. Least squares linear phase FIR filter design and its VLSI implementation. Analog Integr Circ Sig Process 105, 99–109 (2020). https://doi.org/10.1007/s10470-020-01688-9

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  • DOI: https://doi.org/10.1007/s10470-020-01688-9

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