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Neuro-inspired computing chips

Nature Electronics volume 3, pages 371–382 (2020)Cite this article

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Abstract

The rapid development of artificial intelligence (AI) demands the rapid development of domain-specific hardware specifically designed for AI applications. Neuro-inspired computing chips integrate a range of features inspired by neurobiological systems and could provide an energy-efficient approach to AI computing workloads. Here, we review the development of neuro-inspired computing chips, including artificial neural network chips and spiking neural network chips. We propose four key metrics for benchmarking neuro-inspired computing chips — computing density, energy efficiency, computing accuracy, and on-chip learning capability — and discuss co-design principles, from the device to the algorithm level, for neuro-inspired computing chips based on non-volatile memory. We also provide a future electronic design automation tool chain and propose a roadmap for the development of large-scale neuro-inspired computing chips.

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Fig. 1: Computing architectures and paradigms.
Fig. 2: Benchmarks.
Fig. 3: Application-dependent device metric requirements.
Fig. 4: Analogue computing with NVM.
Fig. 5: EDA tool chain.
Fig. 6: Roadmap.

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Acknowledgements

This work is supported in part by the National Key R&D Program of China (2019YFB2205104), National Natural Science Foundation of China (61851404), Beijing Municipal Science and Technology Project (Z191100007519008), Huawei Project (YBN2019075015), and Beijing Tsinghua and Hsinchu Tsinghua Joint Project.

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  1. These authors contributed equally: Wenqiang Zhang, Bin Gao.

Authors and Affiliations

  1. Institute of Microelectronics, Beijing Innovation Center for Future Chips (ICFC), Tsinghua University, Beijing, China

    Wenqiang Zhang, Bin Gao, Jianshi Tang, Peng Yao, He Qian & Huaqiang Wu

  2. Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing, China

    Bin Gao, Jianshi Tang, He Qian & Huaqiang Wu

  3. School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA

    Shimeng Yu

  4. Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan

    Meng-Fan Chang

  5. Department of Electrical Engineering and Computer Science, Korea Advanced Institute of Science and Technology, Daejeon, Republic of Korea

    Hoi-Jun Yoo

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W.Z. and B.G. contributed to data collection, analysis and writing. All the authors contributed to discussion and revised the manuscript at all stages. H.W. contributed to work planning and development.

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Correspondence to Huaqiang Wu.

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Zhang, W., Gao, B., Tang, J. et al. Neuro-inspired computing chips. Nat Electron 3, 371–382 (2020). https://doi.org/10.1038/s41928-020-0435-7

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