Improved Jaya algorithm-based FOPID/PID for AVR system

This paper aims to get the optimal controller parameters of fractional order proportional integral derivative (FOPID)/proportional integral derivative (PID) i.e. K_p, K_i, K_d, λ and µ for designing controller in automatic voltage regulator (AVR) system.

A novel method is proposed to get the optimal controller parameters for designing controller in AVR system using improved Jaya algorithm (IJA). The time domain objective and regular integral error objectives are used to design the controller to estimate the performance of the AVR system based on optimal tuning FOPID/PID controller.

The proposed method captures time domain objective of the FOPID/PID controller design and demonstrates effective transient response and better control action. The efficient tuning of FOPID controller results in high superiority of control efforts.

The simulations of IJA-based FOPID/PID controller design method are performed in MatLab tool and compared with several methods in the recent state of the art and the same are observed to be robust for the AVR system.

The developed optimal FOPID/PID controller tuning using IJA optimization method is totally a new approach for the AVR system in the literature.