On the frequency and voltage-dependent main electrical parameters of the Au/ZnO/n-GaAs structures at room temperature by using various methods

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Abstract

The surface states (Nss), relaxation time (τ), and series resistance (Rs) values as a function of frequency for various bias voltage of the metal-insulator-semiconductor (MIS) structure were obtained by using the impedance measurements which is including capacitance (C) and conductance (G/ω) in the frequency range of 0.5–500 kHz at room temperature. C/G-V plots for each frequency have inversion-depletion-accumulation regions and show a strong frequency and voltage-dependent at low-moderate frequencies due to the existence of Nss, Rs and Zinc Oxide (ZnO) interlayer. The parallel conductance (Gp/ω) between −2 and 1.5 V shows a distinctive peak for almost every voltage and its position shifts to higher frequencies with increasing voltage. The values barrier height (ФB), concentration of donor atoms (ND), and depletion layer thickness (WD) were calculated from the slope and intercept C−2-V plots as function of frequency. On the other hand, ideality factor (n), barrier-height (ΦBo) and Rs of the structure were calculated from both the thermionic-emission (TE) and Cheung functions which are usually good consisted with each other, some little discrepancies in them were attributed to the voltage-dependent of them and the nature of the used technique.

Introduction

Since metal-semiconductor with an interfacial layer such as oxide and polymer, metal semiconductor (MS) structure converts to the metal-insulator-semiconductor (MIS)/metal oxide-semiconductor (MOS) and metal-polymer-semiconductor (MPS) type structures. If the thickness of this interlayer (di) is higher than 20–30 nm, these structures are known as MOS and type capacitors [[1], [2], [3], [4], [5], [6], [7]]. In applications, these structures usually deviated from the ideality due to the existence of Nss located at interlayer/semiconductor interface and their relaxation time (τ), interlayer and its homogeneity, Rs, non-homogeneity of doping concentration atoms in the semiconductor, and surface or fabrication processes [[8], [9], [10]]. In MIS structures, there is a continuous distribution of Nss between interfacial layer and semiconductor within the bandgap and even extend at valence/conduction (Ev/Ec) band and usually, they rooted from the interruption of the periodic lattice, cleaning and fabrication processes, the formation of the native or deposited interfacial layer, and organic pollution in the laboratory environment [[11], [12], [13], [14], [15]]. When electrons or holes are trapped in these states, they will act as positive or negative charges at the interface [1,2].

In general, a high-dielectric interlayer can act as an excellent surface passivation effect on the surface of the semiconductor and they can easily polarize under an electric field that displaces the charges or dipoles from their equilibrium position at low-intermediate frequencies. Thus, the use of such an interlayer can also store more and more charges/energy. In other words, in order to increase the value of C (=ε′εoA/di), has to use of a thin and high-dielectric interlayer between metal and semiconductor and also metal and semiconductor remain separated by this interfacial layer and prevent inter-diffusion between of them. Although there are several methods to employ to measure and characterize the Nss in MIS type structure, the most sensitive one is the conductance method which is proposed by Nicollian-Goetzberger [15]. The other two critical methods are high-low frequency (CHF-CLF) capacitance method developed by Berglund and forward bias current-voltage (I–V) method developed by Card and Rhoderick which are also being simple and fast [[11], [12], [13], [14], [15]]. According to conductance method, equivalent circuits for the MIS/MOS structure consist of a parallel C and G combination and a series interfacial layer capacitance (Ci or Co) of them [1,2,15].

Gallium Arsenide (GaAs) has been shown to achieve the preparation of MIS/MOS type structures due to their high electron mobility, the large bandgap of energy (Eg), the simplicity of fabrication and adaptability to thin film applications in optoelectronics and microwave devices [16,17]. Zinc oxide (ZnO) is also a very promising ceramic-material for the applications of the semiconductor in the UV-region devices such as light-emitting and laser diodes ((LEDs and LDs), photodetectors, and Schottky barrier diodes (SBDs) [[18], [19], [20], [21]]. ZnO also has an II-VI n-type hexagonal wurtzite crystal structure (a = 3.249 Å, c = 5.2057 Å) with a direct large band-gap (Eg = 3.37 eV) and exciton-binding energy (Eb = 60 meV), low cost, non-toxicity and low-temperature deposition [[22], [23], [24]]. There are many different methods to deposit ZnO films such as chemical vapor deposition (CVD), sol-gel method, and radio frequency (RF) magnetron-sputtering [25,26]. However, in this study, the RF magnetron sputtering method has been chosen owing to several advantages compared to other deposition techniques. Because, this technique yields more homogeneous sputtering on a large area, reproducible results and requires a simple apparatus, has a high deposition rate [22].

In this study, in order to best understand the effects of different type Nss and their τ on the Au/ZnO/n-GaAs (MIS) structures, the conductance, and high-low capacitance (CHF-CLF) methods were used. For this aim/purpose, the electric properties of the fabricated these structures have been investigated as a function of frequency and voltage by using reverse and a forward bias impedance spectroscopy method (ISM) in the wide range frequency (0.5–500 kHz at room temperature. The ФB, ND, and WD values were calculated from the C−2-V plots for high-frequencies. The values of Rs were also extracted from the measured C and G data by using Nicollian-Brews method as a function of voltage for each frequency.

Section snippets

Experimental procedures

In this study, Au/ZnO/n-GaAs (MIS) structures were fabricated on n-type GaAs wafer with (100) float zone/orientation, 300 μm thickness, ~3 × 1018 cm−3 doping concentration of donor atoms (Si) by the supplier. Firstly, the n-GaAs wafer was chemically cleaned in the acetone and isopropyl alcohol in an ultrasonic bath for 5 min and then quenched in deionized water with 18 MΩ resistivity. Au/Ge or Au/Ge–Ni alloys can be successfully used as ohmic contact, but it is necessary both more time/energy

Impedance-voltage-frequency (Z-V-f) characteristics of Au/ZnO/n-GaAs structure

Both the value of C and G were measured in the wide frequency range (0.5–500 kHz) and represented in Fig. 2, Fig. 3, respectively. As shown in these figures, both the value of C and G/ω are considerably changed both voltage and frequency. But, these changes in the C and G/ω are considerably high at low-intermediate frequencies both in depletion and accumulation regions. While the C and G increase with increasing voltage decreases with increasing frequency. The observed downward bending in the

Conclusion

The frequency and voltage dependence of C–V and G/ω-V of the Au/ZnO/n-GaAs structure was investigated by considering the effects of the Nss, Rs, and ZnO interlayer at room temperature. These measurements were performed in wide range of voltage frequency (0.5 kHz-0.5 MHz) and voltage ((-5.5 V) - (+1.5 V)), respectively. Both the Nss and Rs versus V curves were determined by using conductance and Nicollian-Brews methods, respectively. Experimental results demonstrate that both the capacitance and

CRediT authorship contribution statement

Buket Akın: Conceptualization, Resources. Şemsettin Altındal: Supervision.

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