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An extended high-voltage-gain DC–DC converter with reduced voltage stress on switches/diodes

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Abstract

A new transformer-less boost-based DC–DC converter is suggested in this research. The voltage gain of the proposed converter is enhanced employing a charge-pump circuit (CPC) and n-stages of voltage multiplier cells (VMC). Each VMC consists of one inductor, one diode, and two capacitors. As the number of these VMC stages (n) increases, it is feasible to achieve high voltage gains with low duty cycles. Furthermore, by expanding n, a significant reduction of the normalized peak voltage stress (NPVS) of the components is possible. Due to this feature, using the MOSFET switches with low ON-state resistance and the low-rating voltage components is provided which results in diminishing the conduction and switching losses. The steady-state analysis is accomplished in details and the comparison considering other converters in the literature is presented in this manuscript. Validating of the converter performance is accomplished by implementing a laboratory prototype for the power of 300 W, input, and output voltages of 30 V and 310 V, respectively, and switching frequency of 40 kHz. Experimental results validate the mathematical analysis.

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Correspondence to Mohammad Saremi.

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Pourfarzad, H., Saremi, M. & Jalilzadeh, T. An extended high-voltage-gain DC–DC converter with reduced voltage stress on switches/diodes. Electr Eng 102, 2435–2452 (2020). https://doi.org/10.1007/s00202-020-01040-4

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