Abstract
The aim of this study is to reduce the oxide and interface-trap charges and also improve the stability at the oxide–semiconductor interface by growing a SiO2 interface layer on a Si wafer then depositing Al2O3 thin film. Effective oxide charges density (Nox), border trap charges density (Nbt), interface states density (Nit), diffusion potential (VD), donor concentration (ND), and barrier height \({(\varPhi }_{\mathrm{B}})\) were calculated using the capacitance–voltage (C–V) and conductance–voltage (G/ω–V) measurements at different annealing temperatures. The flat-band voltage (Vfb) changed with annealing temperature and the Vfb value for the 450 °C annealed sample was closest to the ideal Vfb. The sample also possessed a high dielectric constant. For these reasons, C–V and G/w–V values of this sample at different frequencies were obtained. Compared to previous studies, very low Nbtvalues (~ 109 eV−1 cm−2), low Nit values (~ 1010 eV−1 cm−2) and high \({\varPhi }_{\mathrm{B}}\) values for the annealed samples were obtained due to the SiO2 interface layer.
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This work is supported by the Presidency of Turkey, Presidency of Strategy and Budget under Contract Number 2016K12-2834.
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Kimbugwe, N.T., Yilmaz, E. Impact of SiO2 interfacial layer on the electrical characteristics of Al/Al2O3/SiO2/n-Si metal–oxide–semiconductor capacitors. J Mater Sci: Mater Electron 31, 12372–12381 (2020). https://doi.org/10.1007/s10854-020-03783-z
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DOI: https://doi.org/10.1007/s10854-020-03783-z