A Class-E high-voltage pulse generator for ultrasound medical imaging applications

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Abstract

A Class-E high-voltage IC pulse generator which can be employed in front-end transducers for MEMS ultrasound medical imaging applications is investigated in this paper. The high drain-to-source voltage stress is reduced by the employment of the self-biased cascode configuration. Experimental IC measurement results demonstrate that the self-biased cascode configuration can generate over 36-V high voltage pulses with a 5-Vpp input triggering signal from a 5-V supply voltage at a broad range of output capacitive loads for 32-MHz MEMS ultrasound transducer.

Introduction

For decades, we have known that ultrasound is a reliable, safe and the minimally invasive treatment, which it can also provide doctors with much knowledge about the functions of the human body. Moreover, the approach generally does not require injections or incisions. Patients are not exposed to harmful radiation, making the procedure safer than other diagnostic techniques [1,2].

Recently, with the proliferation of silicon-micromachining techniques, the capacitive micro-machined ultrasound transducer (CMUT) technology for ultrasound applications has become a promising alternative due to the advantages over the conventional piezoelectric transducer [3]. Moreover, one of the most important applications of the ultrasound transducer is the high intensity focused ultrasound (HIFU) which has been demonstrated great promise for cancer therapy [4,5] and its driving circuitry has also been proposed in Ref. [6,7]. Other ultrasound transducers come in a variety of forms and sizes ranging from single-element transducers for mechanical scanning and linear arrays to multi-dimensional arrays for electronic scanning, which are used to form a medical image. Fig. 1(a) reveals the block diagram for an A (amplitude)-mode ultrasound imaging. The pulse generator (pulser) produces high-intensity short pulses to excite a single-element transducer. The returned echoes from the tissues are detected by the same transducer, amplified, and processed for display. A more popular B (brightness)-mode scanner of two-dimensional ultrasound imaging is indicated in Fig. 1(b), in which the received echo amplitude in each pixel is represented by a gray level and the position of the transducer in the x-y-plane is encoded. The positional information of the beam, plus the video signal representing echoes returned from the z-direction, are converted into a format compatible with a digital display. If the transducer is scanned in the x-direction, the generated image represents an image of structures in the x-z-plane.

In terms of the state-of-the-art technologies, it is complicated to achieve three-dimensional systems just with a simple method and require a certain degree of capital investments whereas due to the progress of integrated circuit (IC) technologies, the two-dimensional transducer array can reach the same capability of a three-dimensional system. By employing more and more elements of IC with transducer arrays can reduce the cost of three-dimensional imaging systems. Each of the front-end interface circuitry includes a driver, a protection scheme, and a readout circuit. Notice that the principal advantage of IC pulsers is that they can provide high-voltage pulses to each of the elements in the array without large external electronics or a large amount of cables. The inevitable issues [8] associated with two-dimensional array transducers are the increased element count and limited element size in both dimensions due to aperture sampling requirements, which push the requirement of replacing the external wires with the electrical interconnections since excessive interconnections will result in difficulties in implementation.

Although much research has been done concerned with high-voltage pulser design [3,11,12,16,17] the operating frequencies of these transducers were much lower than 10 ​MHz. Many circuits were also proposed to generate the required high DC voltages [11]. Some of these were based on coupled inductors to achieve the high-voltage gain, others were based on capacitor chains interconnected by diodes and coupled in parallel with two non-overlapping clocks. Moreover, electromagnetic transformers were developed to generate the required high-voltage pulses. Recent research indicated that the maximum DC voltage produced by the on-chip high-voltage charge pump in silicon-on-insulator CMOS was 27 ​V. These papers presented the technology that can be used in the process of circuit operating at voltages higher than 30 ​V in the future [12,13]. Much research concerned with the implementation of high-voltage transducers for medical imaging applications and their protection circuits have been published [3,[8], [9], [10], [11]]. Among them, a popular approach was employing a Class-D output stage with a high-voltage manufacturing process. As a result, not only complementary high-voltage supplies were needed [7] but also complementary high-voltage input triggering signals and other high-voltage input control signals were also required. Moreover, the output terminal had a much higher parasitic capacitance due to the transistors were driven to act as a two-pole switch, which could lower its operating frequency. Furthermore, since the input control signals were driven with non-overlapping clocks, protection circuits were compulsively necessary to prevent the pulser from creating short-circuit large current. In this paper, in order to achieve a high-voltage and high-power-efficiency front-end transducer, a Class-E output stage with a shielded choke inductor is employed to boost the output pulse voltage level with a low-voltage supply.

In the rest parts of the paper, the proposed CMOS Class-E high-voltage front-end pulser is presented in section II together with some design considerations concerned with the non-idealities of the Class-E operation. The experimental verifications of the proposed circuit are addressed in section III and the conclusion is given in the final section.

Section snippets

The proposed configuration of the Class-E high-voltage pulser

The idea behind the Class-E operation is to employ the character of non-overlapping output voltage and output current. Under this principle, the Class-E operation has the characters of high power efficiency, simplicity, and relatively high tolerance to circuit variations.

Experimental and measured results

The verification of the proposed CMOS IC pulser has been performed with the measurement results of a prototype test IC. The implementation of the proposed pulser is based on the devices which can stand at least 40 ​V of drain-to-source and drain-to-gate voltages. Also a gate-to-source voltage can stand up to 12 ​V. Therefore, we implement the test IC with the TSMC 0.25 ​μm CMOS high-voltage technology process, T25HVG2 provided through the CIC foundry service [14].

The completed schematic to test

Conclusion

The newly proposed Class-E high-voltage ultrasound pulser for front-end transmitters to interface two-dimensional CMUTs has been presented. The high output voltage stress of the driver transistor can be reduced by the employment of the self-biased cascode configuration. With the inherent characters of the Class-E operation, the proposed alternative implementation approach has the benefits of low supply voltage, high output voltage level, and does not have the conventional large short-circuit

CRediT authorship contribution statement

Steve Hung-Lung Tu: Conceptualization, Methodology, Writing - original draft, Writing - review & editing, Supervision. Po-Yu Tsai: Methodology, Software.

Declaration of competing interest

The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper.

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