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Design of High-Speed Logic Circuits with Four-Step RRAM-Based Logic Gates

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Abstract

The RRAM (resistive random-access memory) is one of the most competitive candidates of the emerging non-volatile memory devices. In recent years, the RRAM has been used as memory device and also to build logic circuit. However, the design method of the RRAM-based logic circuit is still an open issue. This paper proposes a design method of logic circuit based on the four-step RRAM logic gates. The design rules are studied for both the combinational and the sequential logic circuits in a parallel style. The design practices and synthesis results show that the proposed methods generate the high-performance circuits for the arbitrary logic functions. Moreover, the four-step RRAM-based logic gates are suitable for designing the circuits with pipelined architecture, since the different RRAM logic blocks have the uniform working speed. The pipelined N-bit ripple carry adder and the N-bit multiplier outperform the other RRAM base counterparts; the output results are obtained only with 2N + 2 and 6N− 4 working cycles, respectively.

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Acknowledgement

This work was supported by Shenzhen Science and Technology Innovation Committee under Grant No. JCYJ20170412150411676, National Natural Science Foundation of China under Grant No. U1613215, and TSV 3D Integrated Micro/Nano system Lab under Grant No. ZDSYS201802061805105.

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Authors and Affiliations

  1. Key Lab of Integrated Microsystems, Peking University Shenzhen Graduate School, Shenzhen, 518055, China

    Xiaole Cui, Xiao Ma, Qiujun Lin, Xiang Li & Hang Zhou

  2. Institute of Microelectronics, Peking University, Beijing, 100871, China

    Xiaoxin Cui

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  1. Xiaole Cui
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  2. Xiao Ma
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  3. Qiujun Lin
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  4. Xiang Li
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  5. Hang Zhou
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  6. Xiaoxin Cui
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Correspondence to Xiaoxin Cui.

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Cui, X., Ma, X., Lin, Q. et al. Design of High-Speed Logic Circuits with Four-Step RRAM-Based Logic Gates. Circuits Syst Signal Process 39, 2822–2840 (2020). https://doi.org/10.1007/s00034-019-01300-0

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