Abstract
In this study, we design two-way binary-Gray codes encoding/decoding circuit. Two-way means that the circuit can be function programmed as either binary-to-Gray or Gray-to-binary code transformations. A self-checking capability is also embedded in circuit design to enhance the function reliability. The proposed circuit will automatically detect the error due to single-fault occurred in chip internal. Thus, the reliability of the circuit operation is further improved. After the related EDA software simulations, the error self-checking capability and two-way encoding/decoding functions are successfully verified. After simulations, the code transformations are with self-checking and bit-expandable capabilities. The proposed circuit not only improves the operation speed but also reduces the duplicate logic hardware. The concept of carry-select adder (CSA) and add-one circuit are extended in the study to reduce the signal time delay. Based on the technique of two-rail checking code, the circuit is successfully arrived for single fault detectable. By using TSMC CMOS 0.18-μm technology, an experimental chip working in 1.8 V 25 Mb data rate is realized to verify the coding function and fault self-checking capability.
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Acknowledgements
This work was funding part supported by the Ministry of Science and Technology Project (MOST 105-2221-E-167-022), and EDA tools support, experimental CMOS processes and chip fabricated, Taiwan Semiconductor Research Institute (TSRI) and Taiwan Semiconductor Manufactory Corp. (tsmc).
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F.-T.C and Y.-C.H conceived and designed this study after co-discussion; F.-T.C performed CAD tool simulations and the experiments chip measured; Y.-C.H and C.-K.T analyzed the data and wrote/organized the paper.
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Cheng, FT., Hung, YC. & Tung, CK. A highly reliable design for two-way binary-Gray codes transformation. Analog Integr Circ Sig Process 104, 81–92 (2020). https://doi.org/10.1007/s10470-020-01653-6
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DOI: https://doi.org/10.1007/s10470-020-01653-6