Fast Gate-Based Readout of Silicon Quantum Dots Using Josephson Parametric Amplification

S. Schaal, I. Ahmed, J. A. Haigh, L. Hutin, B. Bertrand, S. Barraud, M. Vinet, C.-M. Lee, N. Stelmashenko, J. W. A. Robinson, J. Y. Qiu, S. Hacohen-Gourgy, I. Siddiqi, M. F. Gonzalez-Zalba, and J. J. L. Morton
Phys. Rev. Lett. 124, 067701 – Published 14 February 2020
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Abstract

Spins in silicon quantum devices are promising candidates for large-scale quantum computing. Gate-based sensing of spin qubits offers a compact and scalable readout with high fidelity, however, further improvements in sensitivity are required to meet the fidelity thresholds and measurement timescales needed for the implementation of fast feedback in error correction protocols. Here, we combine radio-frequency gate-based sensing at 622 MHz with a Josephson parametric amplifier, that operates in the 500–800 MHz band, to reduce the integration time required to read the state of a silicon double quantum dot formed in a nanowire transistor. Based on our achieved signal-to-noise ratio, we estimate that singlet-triplet single-shot readout with an average fidelity of 99.7% could be performed in 1μs, well below the requirements for fault-tolerant readout and 30 times faster than without the Josephson parametric amplifier. Additionally, the Josephson parametric amplifier allows operation at a lower radio-frequency power while maintaining identical signal-to-noise ratio. We determine a noise temperature of 200 mK with a contribution from the Josephson parametric amplifier (25%), cryogenic amplifier (25%) and the resonator (50%), showing routes to further increase the readout speed.

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  • Received 23 July 2019
  • Accepted 17 January 2020

DOI:https://doi.org/10.1103/PhysRevLett.124.067701

© 2020 American Physical Society

Physics Subject Headings (PhySH)

Quantum Information, Science & TechnologyCondensed Matter, Materials & Applied Physics

Authors & Affiliations

S. Schaal1,*, I. Ahmed2,‡, J. A. Haigh3, L. Hutin4, B. Bertrand4, S. Barraud4, M. Vinet4, C.-M. Lee5, N. Stelmashenko5, J. W. A. Robinson5, J. Y. Qiu6,§, S. Hacohen-Gourgy6, I. Siddiqi6, M. F. Gonzalez-Zalba3, and J. J. L. Morton1,7,†

  • 1London Centre for Nanotechnology, University College London, London WC1H 0AH, United Kingdom
  • 2Cavendish Laboratory, University of Cambridge, J. J. Thomson Avenue, Cambridge CB3 0HE, United Kingdom
  • 3Hitachi Cambridge Laboratory, J.J. Thomson Avenue, Cambridge CB3 0HE, United Kingdom
  • 4CEA, LETI, Minatec Campus, F-38054 Grenoble, France
  • 5Department of Materials Science & Metallurgy, University of Cambridge, 27 Charles Babbage Road, Cambridge CB3 0FS, United Kingdom
  • 6Quantum Nanoelectronics Laboratory, Department of Physics, University of California, Berkeley California 94720, USA
  • 7Department of Electronic & Electrical Engineering, University College London, London WC1E 7JE, United Kingdom

  • *simon.schaal.15@ucl.ac.uk
  • jjl.morton@ucl.ac.uk
  • Present address: Department of Electrical & Electronic Engineering, University of Dhaka, Dhaka 1000, Bangladesh.
  • §Present address: Massachusetts Institute of Technology, Cambridge, MA 02139, USA.

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Issue

Vol. 124, Iss. 6 — 14 February 2020

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