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Efficient FPGA-based graph processing with hybrid pull-push computational model

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Abstract

Hybrid pull-push computational model can provide compelling results over either of single one for processing real-world graphs. Programmability and pipeline parallelism of FPGAs make it potential to process different stages of graph iterations. Nevertheless, considering the limited on-chip resources and streamline pipeline computation, the efficiency of hybrid model on FPGAs often suffers due to well-known random access feature of graph processing. In this paper, we present a hybrid graph processing system on FPGAs, which can achieve the best of both worlds. Our approach on FPGAs is unique and novel as follow. First, we propose to use edge block (consisting of edges with the same destination vertex set), which allows to sequentially access edges at block granularity for locality while still preserving the precision. Due to the independence of blocks in the sense that all edges in an inactive block are associated with inactive vertices, this also enables to skip invalid blocks for reducing redundant computation. Second, we consider a large number of vertices and their associated edge-blocks to maintain a predictable execution history. We also present to switch models in advance with few stalls using their state statistics. Our evaluation on a wide variety of graph algorithms for many real-world graphs shows that our approach achieves up to 3.69x speedup over state-of-the-art FPGA-based graph processing systems.

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Acknowledgements

This work was supported by the National Key Research and Development Program of China (2018YFB1003502), the National Natural Science Foundation of China (Grant Nos. 61825202, 61832006, and 61702201).

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Authors and Affiliations

  1. National Engineering Research Center for Big Data Technology and System/Service Computing Technology and System Lab/Cluster and Grid Computing Lab, School of Computer Science and Technology, Huazhong University of Science and Technology, Wuhan, 430074, China

    Chengbo Yang, Long Zheng, Chuangyi Gui & Hai Jin

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  1. Chengbo Yang
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  2. Long Zheng
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  3. Chuangyi Gui
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  4. Hai Jin
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Corresponding author

Correspondence to Long Zheng.

Additional information

Chengbo Yang is now pursuing his master degree in the School of Computer Science and Technology at Huazhong University of Science and Technology (HUST), China. His research interests include graph processing and reinforcement learning.

Long Zheng is now a postdoctoral researcher in the School of Computer Science and Technology at Huazhong University of Science and Technology (HUST), China. He received his PhD degree at HUST in 2016. His current research interests include program analysis, runtime systems, and configurable computer architecture with a particular focus on graph processing.

Chuangyi Gui is currently a PhD candidate in the School of Computer Science and Technology at Huazhong University of Science and Technology (HUST), China. His current research interests include graph processing and reconfigurable computing.

Hai Jin is a Cheung Kung Scholars Chair Professor of computer science and engineering at Huazhong University of Science and Technology (HUST), China. He received his PhD in computer engineering from HUST in 1994. In 1996, he was awarded a German Academic Exchange Service fellowship to visit the Technical University of Chemnitz in Germany. He worked at The University of Hong Kong, China between 1998 and 2000, and as a visiting scholar at the University of Southern California, USA between 1999 and 2000. He was awarded Excellent Youth Award from the National Science Foundation of China in 2001. He is the chief scientist of ChinaGrid, the largest grid computing project in China, and the chief scientists of National 973 Basic Research Program Project of Virtualization Technology of Computing System, and Cloud Security. He is an IEEE Fellow and a member of the ACM. He has co-authored 15 books and published over 600 research papers. His research interests include computer architecture, virtualization technology, cluster computing, and cloud computing, peer-to-peer computing, network storage, and network security.

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Yang, C., Zheng, L., Gui, C. et al. Efficient FPGA-based graph processing with hybrid pull-push computational model. Front. Comput. Sci. 14, 144102 (2020). https://doi.org/10.1007/s11704-019-9020-5

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