Abstract
This paper presents a 4th-order low-pass continuous-time Diode-RC filter with 24 MHz cut-off frequency. The filter structure is based on the combination of positive (passive) and negative (using cross-coupled MOS transistors) cells to synthesize complex-conjugate-poles pairs. Moreover, the filter is designed and optimized to have high-linearity along all the filter pass-band. The filter exhibits 16 dBm-\(\text {IIP}_3\) with 2–3 MHz input tones and 5 dBm-\(\text {IIP}_3\) with 23–24 MHz, whereas the current consumption remains limited to \(100 \, \upmu \hbox {A}\) from 1.8 V supply voltage.
Similar content being viewed by others
References
Silva-Martínez, J., Steyaert, M., & Sansen, W. (2013). High-performance CMOS continuous-time filters. The Springer International Series in Engineering and Computer Science (Springer US).
Yoshizawa, A., & Tsividis, Y. (2002). Anti-blocker design techniques for MOSFET-C filters for direct conversion receivers. IEEE Journal of Solid-State Circuits, 37(3), 357. https://doi.org/10.1109/4.987088.
D’Amico, S., Spagnolo, A., Donno, A., Chironi, V., Wambacq, P., & Baschirotto, A. (2014). A low-power analog baseband section for 60-GHz receivers in 90-nm CMOS. IEEE Transactions on Microwave Theory and Techniques, 62(8), 1724. https://doi.org/10.1109/TMTT.2014.2332877.
Amir-Aslanzadeh, H., Pankratz, E., & Sanchez-Sinencio, E. (2009). A 1-V+ 31 dBm IIP3, reconfigurable, continuously tunable, power-adjustable active-RC LPF. IEEE Journal of Solid-State Circuits, 44(2), 495. https://doi.org/10.1109/JSSC.2008.2011037.
D’Amico, S., Conta, M., & Baschirotto, A. (2006). A 4.1-mW 10-MHz fourth-order source-follower-based continuous-time filter with 79-dB DR. IEEE Journal of Solid-State Circuits, 41(12), 2713. https://doi.org/10.1109/JSSC.2006.884191.
De Matteis, M., Pezzotta, A., D’Amico, S., & Baschirotto, A. (2015). A 63-dB DR 22.5-MHz 21.5-dBm IIP3 fourth-order FLFB analog filter. IEEE Journal of Solid-State Circuits, 50(7), 1516. https://doi.org/10.1109/JSSC.2015.2411626.
D’Amico, S., De Matteis, M., & Baschirotto, A. (2008). In Solid-state circuits conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International (pp. 72–596). https://doi.org/10.1109/ISSCC.2008.4523062.
D’Amico, A., De Matteis, M., D’Amico, S., De Berti, C., Crespi, L., & Baschirotto, A. (2015). In ESSCIRC conference 2015—41st European solid-state circuits conference (ESSCIRC) (pp. 36–39). https://doi.org/10.1109/ESSCIRC.2015.7313822.
D’Amico, S., & Baschirotto, A. (2005). Active-Gm-RC continuous-time biquadratic cells. Analog Integrated Circuits and Signal Processing, 45(3), 281. https://doi.org/10.1007/s10470-005-4956-9.
Sansen, W. (1999). Distortion in elementary transistor circuits. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 46(3), 315. https://doi.org/10.1109/82.754864.
Sansen, W. (2007). In Solid-state circuits conference, 2007. ASSCC’07. IEEE Asian (2007) (pp. 5–9). https://doi.org/10.1109/ASSCC.2007.4425792.
D’Amico, S., De Blasi, M., De Matteis, M., & Baschirotto, A. (2012). A 255 MHz programmable gain amplifier and low-pass filter for ultra low power impulse-radio UWB receivers. IEEE Transactions on Circuits and Systems I: Regular Papers, 59(2), 337. https://doi.org/10.1109/TCSI.2011.2163886.
Lechevallier, J., Struiksma, R., Sherry, H., Cathelin, A., Klumperink, E., & Nauta, B. (2015). In Solid-state circuits conference-(ISSCC), 2015 IEEE International (pp. 1–3). https://doi.org/10.1109/ISSCC.2015.7062943.
Ye, L., Liao, H., Shi, C., Liu, J., & Huang, R. (2010). In Solid state circuits conference (A-SSCC), 2010 IEEE Asian (pp. 1–4). https://doi.org/10.1109/ASSCC.2010.5716607.
Ye, L., Shi, C., Liao, H., Huang, R., & Wang, Y. (2013). Highly power-efficient active-RC filters with wide bandwidth-range using low-gain push–pull opamps. IEEE Transactions on Circuits and Systems I: Regular Papers, 60(1), 95. https://doi.org/10.1109/TCSI.2012.2215700.
Oskooei, M., Masoumi, N., Kamarei, M., & Sjoland, H. (2011). A CMOS 4.35-mW + 22-dBm IIP3 continuously tunable channel select filter for WLAN/WiMAX receivers. IEEE Journal of Solid-State Circuits, 46(6), 1382. https://doi.org/10.1109/JSSC.2011.2120670.
Ghamari, S., Tasselli, G., Botteron, C., & Farine, P. A. (2015). In Proceedings of the 41th European solid-state circuits conference. (IEEE), EPFL-CONF-208828.
Author information
Authors and Affiliations
Corresponding author
Additional information
Publisher's Note
Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.
Appendices
Appendix 1
The quality factor trimming detailed in Sect. 3.3 is based tuning of each capacitors in the circuit in Fig. 4, which would be adjusted in order to compensate to any mismatch between the impedances R and \(R^*\), defined in Figs. 1 and 2. The transfer function is calculated starting from the single-ended model shown in Fig. 18. The Kirchhoff’s current law is applied at all nodes, obtaining the system (18).
By solving the system, the filter transfer function H(s) is derived in (19).
with
In presence of process variation, each of the terms could deviate from its nominal value, modifying therefore the denominator coefficients and, consequently, the poles frequency \(f_o\) and quality factor Q. The Q-trimming approach used in this paper is similar to the one presented in [9], where all of the spreads are modeled to be caused by the resistances and the transconductances. As shown in Figs. 5 and 6 it is possible to adjust each of the capacitors value to correct this deviation. However, due to the complexity of these terms, a closed-form equation relating the Q’s and different denominator coefficients is not achievable and, therefore, the capacitances \(C_{1{-}4}\) could not be directly expressed as a function of the other impedances process spread. This means that a numerical solution to for the trimming system is required.
Appendix 2
The main source of distortion of the proposed biquad cell (Fig. 7) comes from \(\textit{MN}_1\) and \(\textit{MN}_2\) transistors, which act like Source Follower and whose structure is reported in Fig. 19. According to the analysis reported in [10], the \(\text {IIP}_3\) in a source follower is calculated as shown in (20).
where \(\text {IM}_3\) is the third order intermodulation product.
For the Source Follower the \(\text {IM}_3\) is calculated as in (21) [10].
where \(V_\textit{ov}\) is the overdrive voltage of transistor \(M_1\) and T is the loop gain which is calculated in (22).
where \(g_m\) is the transconductance of transistor \(M_1\), \(r_\textit{DS}\) and \(V_E\) are respectively the output resistance and the Early voltage of transistor \(M_2\).
In the proposed biquad cell (Fig. 7), the input voltage \(V_\textit{in}\) of the Source-Follower in Fig. 19, corresponds to the differential voltage at the Gates \(V_\textit{in,g}\) of \(\textit{MN}_1\) and \(\textit{MN}_2\), whereas the loop gain \(T_\textit{bc}\) can be written as in (23).
where \(Z_s\) represents the parallel of the output resistance of \(\textit{MN}_{b,1}\) (\(r_o\)) and \(C_2\), whereas \(g_\textit{m,n}\) is the transconductance of \(\textit{MN}_1\).
\(V_\textit{in,g}\) is derived in (24).
By replacing \(V_\textit{in}\) with \(V_\textit{in,g}\) and T with \(T_\textit{bc}\) in (21) and by combining (21) with (22), the \(\text {IIP}_3\) of the proposed biquadratic cell is derived in (25).
where \(V_\textit{ov}\) is the overdrive of \(\textit{MN}_1\) MOS transistor, and \(V_A\) is the Eraly voltage of \(\textit{MN}_{b,1}\) MOS transistor. The approximation in (25) is valid if \(g_{m,n}\cdot r_o \gg 1\).
Rights and permissions
About this article
Cite this article
D’Amico, A., De Matteis, M., D’Amico, S. et al. A 4th-order 100 μA Diode-RC-based filter with 5 dBm-IIP3 at 24 MHz cut-off frequency. Analog Integr Circ Sig Process 102, 341–352 (2020). https://doi.org/10.1007/s10470-019-01558-z
Received:
Revised:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s10470-019-01558-z