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Mel Scale-Based Linear Prediction Approach to Reduce the Prediction Filter Order in CELP Paradigm Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-25 M. S. Arun Sankar, P. S. Sathidevi
This paper proposes a novel method to reduce the order of prediction filter from 10 to 7 in Code Excited Linear Prediction (CELP) coding framework by the inclusion of psychoacoustic Mel scale into Linear Predictive Coding (Mel-LPC). Efficient quantization methods using 2-split Vector Quantization (VQ) for Mel-LPC obtained a reduction of 4 bits/frame and resulted in a total bit gain of 200 bps. A weighting
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A Low Area FPGA Implementation of Reversible Gate Encryption with Heterogeneous Key Generation Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-22 K. Saranya, K. N. Vijeyakumar
The reversible computation is the process of designing the architecture with reversible logic gates (RLG) and applicable for optical computing, digital signal processing, nanotechnologies and low-power circuits. In this study, integer wavelet transform (IWT) compression technique is applied to the input image to compress the pixel value. The utilization of the IWT is used to improve the quality of
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Generalized Variable Step-Size Diffusion Continuous Mixed p -Norm Algorithm Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-21 Long Shi, Haiquan Zhao
The generalized variable step-size diffusion continuous mixed p-norm (GVSS-DCMPN) algorithm is proposed in this paper, which is derived based on the improved continuous mixed p-norm (CMPN) strategy. In detail, a linear function is designed for the CMPN strategy. The proposed GVSS-DCMPN algorithm capable of exploiting various error norms to obtain performance improvement in non-Gaussian noise environment
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A Power-Efficient SAR ADC with Optimized Timing-Redistribution Asynchronous SAR Logic in 40-nm CMOS Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-21 Mengying Hu, Jing Jin, Yuekang Guo, Xiaoming Liu, Jianjun Zhou
This paper presents a power-efficient successive-approximation register (SAR) analog-to-digital converter (ADC) with fast response reference buffer (RV-buffer). Several techniques are applied in the system design to improve the performance of the SAR ADC. A novel timing-redistribution SAR logic is proposed to balance the difference between required settling time for the most significant bit and the
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Adapted Jacobi Orthogonal Invariant Moments for Image Representation and Recognition Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-19 Amal Hjouji, Rachid Chakid, Jaouad El-Mekkaoui, Hassan Qjidaa
Images recognition and classification require an extraction technique of feature vectors of these images. These vectors must be invariant to the three geometric transformations: rotation, translation and scaling. Several authors used the theory of orthogonal moments to extract the feature vectors of images. Jacobi moments are orthogonal moments, which have been widely applied in imaging and pattern
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Fast Computation of 3D Discrete Invariant Moments Based on 3D Cuboid for 3D Image Classification Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-16 Hicham Karmouni, Mohamed Yamni, Omar El Ogri, Achraf Daoui, Mhamed Sayyouri, Hassan Qjidaa, Ahmed Tahiri, Mustapha Maaroufi, Badreeddine Alami
The use of 3D discrete orthogonal invariant moments as descriptors of images constitutes one of the hot topics in the field of 3D image analysis, especially in the recognition and classification of deformed objects, due to their high numerical precision and low computing complexity. The TSR (translation, scale and rotation) invariant functions of discrete orthogonal moments can be obtained by expressing
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Asynchronous $$H_{\infty }$$ H ∞ Control of Uncertain Switched Singular Systems with Time-Varying Delays Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-15 Jing Wang, Xingtao Wang
This paper is concerned with the problem of \(H_{\infty }\) control for a class of uncertain switched singular systems with time-varying state delays under asynchronous switching. The asynchronous phenomenon is caused by the choice of controller lagging behind the corresponding subsystem in practice. First, sufficient conditions by finding a novel piecewise Lyapunov–Krasovskii function combining with
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Stochastic Resonance Effect in Optimal Decision Solution Under Neyman–Pearson Criterion Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-13 Ting Yang, Yu Li, Shiju Yang, Shujun Liu
In this paper, stochastic resonance effect on the optimal detection under Neyman–Pearson (NP) criterion is investigated for a general nonlinear system. To this end, a noise enhanced detection optimization problem for maximizing the probability of detection under a constant constraint on the probability of false-alarm is formulated, where an additive noise is added to the nonlinear system input and
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Transformation of 2D Roesser into Causal Recursive Separable Denominator Model and Decomposition into 1D Systems Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-13 Muhammad Imran, Abdul Ghafoor, Muhammad Imran
A transformation for the 2D system is proposed to transform the original 2D systems into causal recursive separable denominator systems. 2D causal recursive separable denominator systems with minimal rank-decomposition can be written into two 1D systems for ease in the analysis and model order reduction.
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Improved Hybrid Block-Based Motion Estimation for Inter-frame Coding Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-11 Yusra Ahmed Salih, Loay Edwar George
Digital video technology has been increasingly needed in various fields, such as telecommunications, entertainment, medicine. Therefore, video compression is required. Motion estimation methods help in improving video compression efficiency by effectively removing the temporal redundancy between successive frames. Several block-based motion estimation (BME) algorithms are being suggested to reduce
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Event-Triggered Finite-Time $$H_{\infty }$$ H ∞ Filtering for a Class of Switched Nonlinear Systems Via the T–S Fuzzy Model Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-11 Hui Gao, Kaibo Shi, Hongbin Zhang
The paper focuses on the finite-time \(H_{\infty }\) filtering (FTHF) design problem for a class of switched nonlinear systems (SNSs) via the T–S fuzzy model method. Different from the traditional FTHF design methods with time-triggered mechanism, a novel event-triggered scheme is proposed for SNSs, which takes full advantage of mixed switching signals. The information of system output and switching
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Realization of a Fourth-Order Linear Time-Varying Differential System with Nonzero Initial Conditions by Cascaded two Second-Order Commutative Pairs Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-11 Salisu Ibrahim, Mehmet Emir Koksal
Decomposition is an important tool that is used in many differential systems for solving real engineering problems and improving the stability of a system. It involves breaking down of high-order linear systems into lower-order commutative pairs. Commutativity plays an essential role in mathematics, and its applications are extended in physical science and engineering. This paper explicitly expresses
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A Novel Closed-Form Estimator for AOA Target Localization Without Prior Knowledge of Noise Variances Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-11 Feifei Pang, Xiangxi Wen
This paper addresses the problem of target localization using angle-of-arrival (AOA) measurements when the prior information of the AOA measurement noise variance is unavailable. At first, a maximum likelihood estimator (MLE) and the Cramér–Rao lower bound are derived for the case where the unknown noise variance is a function of the target-to-sensor distance. Then, a novel estimator is proposed to
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Single-Ended 10T SRAM Cell with High Yield and Low Standby Power Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-11 Erfan Shakouri, Behzad Ebrahimi, Nima Eslami, Mohammad Chahardori
This paper introduces a 10T single-ended SRAM cell with high stability and low static power. The read static noise margin is augmented by using a Schmitt-trigger inverter and decoupling the storage node from the read bitline by adding one transistor. Since writing “1” is difficult in single-ended SRAM cells, using proper capacitive coupling and also extra pMOS transistor as an access transistor mitigates
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Variance Normalised Features for Language and Dialect Discrimination Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-11 Xiaoxiao Miao, Ian McLoughlin, Yan Song
This paper proposes novel features for automated language and dialect identification that aim to improve discriminative power by ensuring that each element of the feature vector has a normalised contribution to inter-class variance. The method firstly computes inter- and intra-class frequency variance statistics and then distributes the overall spectral variance across spectral regions which are sized
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Classic Scaling Fractal Fractance Approximation Circuits: Optimization Principle Analysis and Method Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-07 Yue-Rong Zhang, Qiu-Yan He, Xiao Yuan
This paper presents the optimization principle and law of classic scaling fractal fractance approximation circuits (FACs). The scaling extension of FACs with negative half-order operational performance can facilitate the design of scaling fractal FACs with arbitrary-order fractional operators. This report summarizes the operational performance and mathematics describing of typical scaling fractal FACs
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Matrix Completion Using Graph Total Variation Based on Directed Laplacian Matrix Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-07 Alireza Ahmadi, Sina Majidian, Mohammad Hossein Kahaei
We propose two graph matrix completion algorithms called GMCM-DL and GMCR-DL, by employing a new definition of Graph Total Variation for matrices based on the directed Laplacian Matrix. We show that these algorithms outperform their peers in terms of RMSEs for both cases of uniform and row observations.
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Energy-Efficient and PVT-Tolerant CNFET-Based Ternary Full Adder Cell Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-06 Sepehr Tabrizchi, Fazel Sharifi, Parisa Dehghani
Full adder cell is an important module in arithmetic and processing systems whose performance has a great impact on performance of the whole system. By continuous scaling of the MOS transistors, some challenges and problems appear such as high leakage dissipation for which emerging technologies have been studied as a solution. Carbon nanotube field effect transistor (CNFET) is one of the most potential
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A New Circuit-Level Technique for Leakage and Short-Circuit Power Reduction of Static Logic Gates in 22-nm CMOS Technology Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-05 Mohammad Moradinezhad Maryan, Majid Amini-Valashani, Seyed Javad Azhari
The leakage power, a.k.a. static power, increases in deep-submicron technologies due to short-channel effects. This article proposes a novel input-controlled leakage restrainer transistor (ICLRT)-based technique to reduce leakage power as well as the short-circuit power. The main idea is to place a PMOS and an NMOS ICLRT on top of the pull-up network (PUN) and at the bottom of the pull-down network
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Blind Source Separation Based on Adaptive Artificial Bee Colony Optimization and Kurtosis Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-05 Rongjie Wang
A novel technique is proposed for selecting iterative updates and step sizes based on adaptive function values to compensate for the slow convergence rate of artificial bee colony optimization (ABCO). On this basis, a blind source separation (BSS) algorithm is proposed based on adaptive ABCO and kurtosis, which does not impose any hypothetical requirements on the source signal. By using kurtosis as
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Coefficient-Gradient-Based Individualized Stepsize Adaptation Mechanism for Robust System Identification Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-05 Haider A. Mohamed-Kazim, Ikhlas Abdel-Qader
To efficiently reduce the impact of the trading-off between the convergence rate and the quality of identifying a system, and also to improve the robustness of the algorithm against unknown sparsity levels, a Modified Absolute Weighted Input using Log function (MAWILOG) for NLMS algorithm is proposed. The essence of the proposed algorithm is to assign, individually, each coefficient of the adaptive
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Relaxed Stabilization Conditions for Interconnected Nonlinear Systems Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-05 Souhail Tiko, Fouad Mesquine, Ahmed El Hajjaji
This paper deals with the conservatism reduction of stability and stabilization conditions for nonlinear continuous-time interconnected systems. Based on Takagi–Sugeno modeling, the interconnected system is described by a convex combination of interconnected linear systems. Line integral fuzzy Lyapunov functions are considered to develop stability and stabilizability criteria for the considered class
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A Behavioral SPICE Model of a Binarized Memristor for Digital Logic Implementation Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-05 Xiaoyuan Wang, Chenxi Jin, Jason K. Eshraghian, Herbert Ho-Ching Iu, Congying Ha
In this paper, a behavioral SPICE memristor model for digital logic implementation is presented and demonstrated in LTSpice. We show binarized state switching and voltage thresholding in the model, which are both important features in practical digital systems. The use of this SPICE model is straightforward and intuitive because almost all parameters in the model can be changed according to the application
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Joint 2D-DOD and 2D-DOA Estimation for Coprime EMVS–MIMO Radar Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-05 Xianpeng Wang, Mengxing Huang, Liangtian Wan
The issue of two-dimensional (2D) direction-of-departure and direction-of-arrival estimation for bistatic multiple-input multiple-output (MIMO) radar with a coprime electromagnetic vector sensor (EMVS) is addressed in this paper, and a tensor-based subspace algorithm is proposed. Firstly, the covariance measurement of the received data is arranged into a fourth-order tensor, which can maintain the
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Closed-Form Analytical Formulation for Riemann–Liouville-Based Fractional-Order Digital Differentiator Using Fractional Sample Delay Interpolation Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-03 Anmol Gupta, Sanjay Kumar
This paper intends to apply a new mathematical approach based on Riemann–Liouville fractional–differential operator to the design of fractional-order digital differentiators (FODDs). Under the research area of fractional-order calculus, Grünwald–Letnikov (GL) and Riemann–Liouville (RL) are most widely used fractional–differential operators. The GL-based methods have been extensively investigated by
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Design of a Two-Channel Quadrature Mirror Filter Bank Through a Diversity-Driven Multi-Parent Evolutionary Algorithm Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-03 Sumika Chauhan, Manmohan Singh, Ashwani Kumar Aggarwal
A multi-objective problem-solving technique for designing a two-channel quadrature mirror filter bank is proposed, where the objectives are to minimize the errors of the passband, stopband and transition band. An evolution-based algorithm, “diversity-driven multi-parent evolutionary algorithm with adaptive non-uniform mutation” (DDMPEA), is proposed for this purpose. The proposed algorithm employs
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Flat-High-Gain Design and Noise Optimization in SiGe Low-Noise Amplifier for S–K Band Applications Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-03 Zhenrong Li, Boyu Liu, Yiming Duan, Zeyuan Wang, Zhen Li, Yiqi Zhuang
This paper presents an ultra-wideband (UWB) low-noise amplifier (LNA) with extremely flat-high-gain and low-noise figure (NF). In traditional resistive feedback topology, input matching, gain, and NF cannot be balanced. For better performance trade-offs in UWB design, a novel emitter-follower resistive feedback (EFRFB) is introduced, which utilizes a common-collector amplifier followed by a feedback
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Robust Time-Varying Parameter Proportionate Affine-Projection-Like Algorithm for Sparse System Identification Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-03 Pucha Song, Haiquan Zhao, Xiangping Zeng, Wei Quan, Liping Zhao
Due to its low computational burden, the affine-projection-like (APL) adaptive filtering algorithm has been extensively studied for colored signal input. Recently, a robust APL algorithm was designed by adopting the M-estimate cost function in impulsive noise environment; however, its convergence rate is very slow for sparse system identification. This paper proposed a proportionate APL M-estimate
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Image Super-Resolution Based on the Down-Sampling Iterative Module and Deep CNN Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-03 Xin Yang, Yifan Zhang, Tao Li, Yingqing Guo, Dake Zhou
Most deep learning-based image SR algorithms do not apply the down-sampling to the reconstructed process. Given this fact and inspired by the iteration idea, we propose a novel image SR method based on the down-sampling iterative module and deep CNN, which explores a new basic iterative module combining up- and down-sampling processes. Each iteration of the iterative module generates the intermediate
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Singular Spectrum Analysis-Based Hierarchical Multiresolution Analysis with Exploitation of Frequency Selectivities of Desirable Grouped Functions Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-03 Peihua Feng, Bingo Wing-Kuen Ling
This paper proposes a singular spectrum analysis (SSA)-based hierarchical multiresolution analysis (HMA) with the exploitation of the frequency selectivities of the desirable grouped functions. To perform the HMA, the SSA components are grouped based on the desirable grouped functions. Similar procedures are applied to the sum of the SSA components in a group in the previous level of decomposition
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$$ H_{\infty } $$ H ∞ Filtering for Discrete-Time Singular Markovian Jump Systems with Generally Uncertain Transition Rates Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-03 Anyou Shen, Lin Li, Chunyu Li
This paper is devoted to the problem of \( H_{\infty } \) filtering for a class of discrete-time singular Markovian jump systems with generally uncertain transition rates. Each transition rate of the jumping process is completely unknown or only the estimated value is known. The objective is to design a \( H_{\infty } \) filter such that the resulting filtering error system is stochastically admissible
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Mixing Matrix Estimation Algorithm for Time-Varying Radar Signals in a Dynamic System Under UBSS Model Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-03 Xiaowei Bai, Weihong Fu, Chunhua Zhou, Yongyuan Liu
This paper presents a novel mixing matrix estimation method based on a frame cluster analysis for application to the dynamic system of radar signals under an underdetermined blind source separation. The received signals are first processed using an adaptive denoising method. They are then divided into different appropriate length frames. Next, the frame type is determined and each frame is processed
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Linear System of Order Reduction Using a Modified Balanced Truncation Method Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-03 Santosh Kumar Suman, Awadhesh Kumar
Most of the physical structures may be described in terms of mathematical models. The mathematical methods of system modelling also lead to a thorough explanation of the mechanism in the form of mathematical equations, which are often difficult to use for both analysis and controller synthesis. Consequently, it is useful and very important to determine the likelihood of different calculations of the
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A New Low-Power Charge Pump with a Glitch-Free PFD for Speedup the Acquisition Process of a PLL in 65 nm CMOS Technology Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-03 Hossein Ghasemian, Amin Bahrami, Ebrahim Abiri, Mohammad Reza Salehi
In this paper, a new low-power charge pump (CP) is presented, which includes a switched-capacitor CP (SC-CP) as the main CP and an auxiliary current-steering CP (ACS-CP) to accelerate the lock process. By using a pulse width controller unit, the ACS-CP activates in predefined phase differences and turns off near the lock region. By utilizing the proposed CP, the issue of traditional current-mismatch
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FM Demodulation Using Dynamic Control Action of a Band Pass Filter Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-03 A. Mukherjee, B. N. Biswas
This paper audits FM demodulation using discriminator circuits, and the FM–AM conversion using a conventional single-tuned, double-tuned and staggered-tuned circuit is discussed. The demodulation capabilities of the double- and staggered-tuned circuits are audited in the time domain. It is observed that the conventional single- and double-tuned circuit outputs are highly distorted, in particular, the
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Quadrature Sinusoidal Oscillators Using CDBAs: New Realizations Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-03 Ram Bhagat, D. R. Bhaskar, Pragati Kumar
Four new circuits of fully uncoupled quadrature sinusoidal oscillators, using two current differencing buffered amplifiers (CDBAs), four/five resistors and two capacitors have been presented. In contrast to all previously published CDBA-based, fully decoupled, quadrature sinusoidal oscillators in which one of the input terminals is left unutilized, the presented circuits are realized by utilizing the
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Effect of Sparse Representation of Time Series Data on Learning Rate of Time-Delay Neural Networks Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-03 Masoumeh Kalantari Khandani, Wasfy B. Mikhael
In this paper, we examine how sparsifying input to a time-delay neural network (TDNN) can significantly improve the learning time and accuracy of the TDNN for time series data. The sparsifying of input is done through a sparse transform input layer. Many applications that involve prediction or forecasting of the state of a dynamic system can be formulated as a time series forecasting problem. Here
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Underdetermined Blind Source Separation Based on Source Number Estimation and Improved Sparse Component Analysis Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-02 Baoze Ma, Tianqi Zhang
The signal acquisition process is limited by the installation position and number of sensors in particular types of equipment. Moreover, the observed signals are often compounded by all sources. In order to solve these problems, an underdetermined blind source separation (UBSS) approach with source number estimation and improved sparse component analysis (SCA) is studied. Firstly, the angular probability
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Finite-time Synchronization of Fuzzy Cellular Neural Networks with Stochastic Perturbations and Mixed Delays Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-02 Dongsheng Xu, Ting Wang, Ming Liu
This paper investigates finite-time synchronization for fuzzy cellular neural networks (FCNNs). In contrast to correlative studies, discrete time delays, distributed delays and stochastic perturbations are taken into consideration. A mathematical model of this kind of FCNN is considered for the first time. By employing the Lyapunov method, graph theory, the feedback control technique and stochastic
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Delay-Dependent and Independent State Estimation for BAM Cellular Neural Networks with Multi-Proportional Delays Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2021-01-02 G. Nagamani, A. Karnan, G. Soundararajan
This paper deals with the issue of state estimation for the class of bidirectional associative memory cellular neural networks (BAMCNNs) involving multi-proportional delays. The main objective of this problem is to sketch a state estimator by utilizing the known output measurements of the proposed network in such a way that the dynamics of the estimation error system is globally asymptotically stable
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Time-Domain Digital-to-Analog Converter for Spiking Neural Network Hardware Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-12-11 Seiji Uenohara, Kazuyuki Aihara
We propose a new digital-to-analog converter (DAC) for realizing a synapse circuit in mixed-signal spiking neural networks. We refer to this circuit as a “time-domain DAC (TDAC)”. It produces weights for converting a digital input code into voltage using one current waveform. Therefore, the TDAC is more compact than a conventional DAC consisting of many current sources and resistors. Moreover, a TDAC
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Comments on “Finite-Time Control of Uncertain Fractional-Order Positive Impulsive Switched Systems with Mode-Dependent Average Dwell Time” Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-08-20 Lingdong Zhao
Some notes are presented on the paper “Finite-Time Control of Uncertain Fractional-Order Positive Impulsive Switched Systems with Mode-Dependent Average Dwell Time ” by Liu L. et al (Circuit Syst Signal Processing 37: 3739–3755, 2018). Fractional calculus has the memory property and this is relevant to the whole process from the initial value \(t_{0}\) to the current time t. However, this important
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A Nonparametric Approach for Multicomponent AM–FM Signal Analysis Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-07-04 Abhay Upadhyay, Manish Sharma, Ram Bilas Pachori, Rajeev Sharma
In this paper, a novel method is presented to analyze the amplitude modulated and frequency modulated (AM–FM) multicomponent signals using a combination of the variational mode decomposition (VMD) and the discrete energy separation algorithm (DESA). In the presented method, firstly, a multicomponent signal is decomposed using VMD method applied in an iterative way. In order to separate the monocomponent
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Sparse Mixed Norm Adaptive Filtering Technique Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-06-23 Nafiseh Maleki, Masoumeh Azghani
In this paper, we would suggest a sparse adaptive filtering technique which is robust against Gaussian and non-Gaussian noises. To this goal, a linear combination of the least mean square and the least mean fourth loss functions has been considered as the fidelity term. Moreover, in order to promote the sparsity property of the underlying vector, we have added different sparsity-inducing penalty terms
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On the Algorithmic Stability of Optimal Control with Derivative Operators Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-06-22 Tim Chen, J. C.-Y. Cheng
The aim of this paper is to develop a productive numerical technique to deal with a class of time partial ideal AI control issues. The classical fuzzy inference methods cannot work to their full potential in such circumstances, because the given knowledge does not cover the entire problem domain. In addition, the requirements of fuzzy systems may change over time. The use of a static rule base may
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An Optimization Framework for the Design of Noise Shaping Loop Filters with Improved Stability Properties Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-06-09 Brett C. Hannigan, Christian L. Petersen, A. Martin Mallinson, Guy A. Dumont
A framework using semidefinite programming is proposed to enable the design of sigma delta modulator loop filters at the transfer function level. Both continuous-time and discrete-time, low-pass and band-pass designs are supported. For performance, we use the recently popularized Generalized Kalman–Yakubovič–Popov (GKYP) lemma to place constraints on the \(\mathcal {H}_\infty \) norm of the noise transfer
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New Results on Stability for a Class of Fractional-Order Static Neural Networks Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-06-06 Xiangqian Yao, Meilan Tang, Fengxian Wang, Zhijian Ye, Xinge Liu
This paper investigates the stability of a class of fractional-order static neural networks. Two new Lyapunov functions with proper integral terms are constructed. These integrals with variable upper limit are convex functions. Based on the fractional-order Lyapunov direct method and some inequality skills, several novel stability sufficient conditions which ensure the global Mittag–Leffler stability
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Distributed Speech Presence Probability Estimator in Fully Connected Wireless Acoustic Sensor Networks Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-06-06 Raziyeh Ranjbaryan, Hamid Reza Abutalebi
This paper presents a Gaussian-based distributed speech presence probability (DSPP) estimator which is applied in fully connected wireless acoustic sensor networks (WASNs). In WASNs, we are primarily interested in optimally utilizing all available information of recorded signals. In this work, under the Gaussian statistical assumption of signals, each node computes the DSPP using its own local signals
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$$\ell _1$$ ℓ 1 -Norm Iterative Wiener Filter for Sparse Channel Estimation Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-06-05 Jun-seok Lim
The recursive-least-squares (RLS) algorithm is one of the most representative adaptive filtering algorithms. \(\ell _1\)-norm full-recursive RLS has also been successfully applied to various sparsity-related areas. However, computing the autocorrelation matrix inverse in the \(\ell _1\)-norm full-recursive RLS generates numerical instability that results in divergence. In addition, the regularization
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Facial Recognition System Using Mixed Transform and Multilayer Sigmoid Neural Network Classifier Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-06-05 Genevieve M. Sapijaszko, Wasfy B. Mikhael
Facial recognition systems are critical components in numerous applications. They are used, for example, to prevent retail crime, unlock phones, find missing persons, protect law enforcement, and aid forensic investigations. In such real-world applications, the identification of facial information must be both quick and exact. The purpose of this study is to improve both the accuracy and speed of facial
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High-Efficient, Ultra-Low-Power and High-Speed 4:2 Compressor with a New Full Adder Cell for Bioelectronics Applications Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-06-02 Ayoub Sadeghi, Nabiollah Shiri, Mahmood Rafiee
Size reduction in complementary metal–oxide–semiconductor integrated circuits (ICs) is a challenge. Carbon nanotube field effect transistor (CNTFET) technology with advantages such as low power, high mobility, and ballistic transmissions is an alternative. Based on the standard 32 nm CNTFET technology, a new 23-transistor full adder cell is proposed with combining advantages of gate diffusion input
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A Neurodynamic Algorithm for Sparse Signal Reconstruction with Finite-Time Convergence Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-05-30 Hongsong Wen, Hui Wang, Xing He
In this paper, a neurodynamic algorithm with finite-time convergence to solve \({L_{\mathrm{{1}}}}\)-minimization problem is proposed for sparse signal reconstruction which is based on projection neural network (PNN). Compared with the existing PNN, the proposed algorithm is combined with the sliding mode technique in control theory. Under certain conditions, the stability of the proposed algorithm
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Passivity Analysis of Fractional-Order Neural Networks with Time-Varying Delay Based on LMI Approach Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-05-28 Nguyen Huu Sau, Mai Viet Thuan, Nguyen Thi Thanh Huyen
In this paper, we study the problem of passivity analysis of fractional-order neural networks (FONNs) with a time-varying delay. By using the Razumikhin fractional-order theorem, we first derive an improved sufficient criterion for asymptotic stability of FONNs with a bounded time-varying delay. Then, based on the proposed stability criterion and some auxiliary properties of fractional calculus, a
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The VLSI Architecture and Implementation of a Low Complexity and Highly Efficient Configurable SVD Processor for MIMO Communication Systems Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-05-28 Wei-Jhe Chen, Yu-An Lai, Chung-An Shen
This paper presents the design and implementation of a low complexity and highly efficient configurable singular value decomposition (SVD) processor for 2 × 2, 4 × 4, 6 × 6, and 8 × 8 MIMO wireless communication systems. In order to minimize the area complexity while maintaining comparable throughput, novel data-processing sequences are proposed so that costly matrix multipliers are eliminated. Furthermore
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Positive Realness of Second-order and High-order Descriptor Systems Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-05-27 Liping Zhang, Guoshan Zhang
This paper is concerned with the positive realness problem for second-order and high-order descriptor systems. First, without any linearization, necessary and sufficient conditions are established under which the second-order descriptor systems are strictly positive real and extended strictly positive real, respectively. Applying the relations between the positive realness and the optimal control theory
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Two Quadrant Analog Voltage Divider and Square-Root Circuits Using OTA and MOSFETs Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-05-26 Ajishek Raj, D. R. Bhaskar, Pragati Kumar
In this communication, two novel architectures of voltage mode analog divider circuit and square-root circuit using an operational transconductance amplifier (OTA) have been presented. The proposed divider circuit employs an OTA and two MOSFETs, while the square-root circuit requires one OTA along with one MOSFET. The proposed divider circuit can also be configured as inverse voltage function generator
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Design of Infinite Impulse Response Filter Using Fractional Derivative Constraints and Hybrid Particle Swarm Optimization Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-05-25 N. Agrawal, A. Kumar, Varun Bajaj
In this paper, a new method for designing digital infinite impulse response filter with nearly linear-phase response is presented using fractional derivative constraints (FDC). The design problem is constructed as a phase optimization problem between the desired and designed phase response of a filter. In order to achieve the highly accurate passband (pb) response, phase response is fitted to desired
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Implementation of High-Efficiency and Ultra-Low-Power Transceiver for the Design of Body Channel Communication Applications Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-05-25 Vitawat Sittakul, S. Vijayalakshmi, V. Nagarajan, K. Sakthidasan Sankaran, Sakthivel Sankaran
Body channel communications (BCCs) were investigated, to enhance requirements for low power and high-reconfiguration power within permitting technology of wireless measurement systems for wireless communication applications. Standard options for BCC are targeted totally toward channel modeling with a potency measuring technique, a transmission technique, and a wireless transceiver style. Wireless digital
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Recursive Identification of Errors-in-Variables Systems Based on the Correlation Analysis Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-05-23 Shujun Fan, Feng Ding, Tasawar Hayat
This paper considers a single-input single-output linear dynamic system, whose input and output are corrupted by Gaussian white measurement noises with zero means and unknown variances; the parameter estimation of such a system is a typical errors-in-variables (EIV) system identification problem. This paper proposes the correlation function-based two-step identification methods for the EIV systems
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Blind Image Deblurring via the Weighted Schatten p -norm Minimization Prior Circuits Syst. Signal Process. (IF 1.681) Pub Date : 2020-05-22 Zhenhua Xu, Huasong Chen, Zhenhua Li
In this paper, we propose a new image blind deblurring model, based on a novel low-rank prior. As the low-rank prior, we employ the weighted Schatten p-norm minimization (WSNM), which can represent both the sparsity and self-similarity of the image structure more accurately. In addition, the L0-regularized gradient prior is introduced into our model, to extract significant edges quickly and effectively
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