In this study, bending reliability of the surface mounted devices (SMD) attached using isotropic conductive adhesive (ICAs) on screen printed stretchable devices polyurethane substrate are investigated. The performance of polyurethane and polyurethane-acrylic ICAs and the impact of rolling speed are studied. The rolling test was performed using the customized automatic rolling test device. It was found

This work investigates the reliability assessment of high-k spacer and the effect of temperature on the device analog/RF performance for Inverted ‘T' (IT) Junctionless (JL) FinFET. A systematic analysis is performed for different high-k spacer materials, like, SiO2, Si3N4, and HfO2 to improve the analog/RF performances. This work also represents the effect of oxide stacking i.e., low-k on high-k materials

Low melting temperature solders are becoming a hot topic in Pb-free solder studies. Among these solders, SnBi has attracted more attention because it can not only reduce the energy for reflow, but more importantly, increase the reliability of joints by minimizing warpage. In this study, the board-level reliability of the assembly of BGA components was investigated. Three types of assemblies are compared:

In this work, we enhance tester-based laser induced techniques to detect defects that cannot be assessed by simple chip power-up and require test cycles to initialize the chip. A statistical resistance variation mapping method is proposed and described. Experimental results will be presented as proof-of-concept.

It is known that quantitative measures for the reliability of software systems can be derived from software reliability models. And, as such, support the product development process. Over the past four decades, research activities in this area have been performed. As a result, many software reliability models have been proposed. It was shown that, once these models reach a certain level of convergence

In this review, a review a of the applications of micro-Raman spectroscopy (μRS) to characterize the residual strain and/or stress in electronic packaging is presented. Micro-Raman spectroscopy is considered as an effective tool for residual stress evaluation in semiconductor devices at the microscale level due to its nondestructive, noncontact feature with high spatial resolution. In this review,

Copper (Cu) wire bonding had been increasingly used in the LST devices in the last decade, especially in the consumer product due to the cost advantage over gold (Au) wire. Recently, needs for replacing Au wire with Cu wire is increasing also automotive industry where electronic devices need to survive harsher environment for a much longer period of time as compared with consumer product. Accordingly

The behavior of modern integrated circuits is altered by numerous effects such as process variation, voltage or temperature shifts and aging (PVTA). To evaluate the impact on system level, extensive simulations must be carried out on transistor-level which is not applicable for larger systems. This paper presents methods for the generation of stochastic behavioral models (SBMs) of circuit components

Reservoirs, extensions at the cathode-end, are constructed to extend the lifetime of integrated circuit (IC) lines in terms of electromigration (EM) damage. The threshold current density jth is the maximum current density that can be supported without causing EM damage due to the matching of the EM driving force and the back flow force, which is related to the atomic density gradient. In a previous

The combined DC-DC power supply is widely used in communication, aerospace and other fields because of its low power consumption, high efficiency, small volume, high reliability, modularization and so on. As the core component of power electronic system, its reliability prediction research has far-reaching practical significance. In this paper, the engineering application of reliability prediction

In this work, the thermal behavior of GaN HEMTs is studied with a three-fold contribution: (i) test structures for resistive thermometry are introduced and manufactured; (ii) subsequently, those are used to perform the on-wafer thermal characterization of small and power HEMTs on SOI, and poly-AlN (QST®) with the aim of comparing the thermal resistance with respect to the reference Si counterpart;

The utilization of power-up values in SRAM cells to generate PUF responses for chip identification is a subject of intense study. The cells used for this purpose must be stable, i.e., the cell should always power-up to the same value (either ‘0’ or ‘1’). Otherwise, they would not be suitable for the identification. Some methods have been presented that aim at increasing the reliability of SRAM PUFs

Fretting wear induced by micro motion is one of the most important factors that affect the electrical contact performance of all electrical connectors. The insertion/withdrawal experiments of certain Sub-Miniature version A (SMA) connector were carried out based on the micro vibration test system. As well as the peak value of the insertion force, the larger the steady-state value of the pullout force

Based on multi-cell structure model, the ruggedness of Dual Gate Commutated Thyristor (Dual GCT) against dynamic avalanche and surge current is examined by the device simulation. The simulation results of turn-off behavior show at smaller turn-off delay time, the current filament caused by dynamic avalanche arises in the GCT-A part, which is adverse for the device, and at larger turn-off delay time

Thermal management is a crucial aspect of electronic assemblies and simulations are playing an important role in decision making during the design phase. For an electronic control unit (ECU), the main heat generating sources are the electronic components soldered on the printed circuit board (PCB). Creating high quality thermal models for the associated components, required in the assembly level simulations

This paper presents the simulation and hardware test results for determining the fatigue life of the solder joints of a printed circuit board (PCB) including a DC to AC inverter circuit with six power metal oxide semiconductor field effect transistors (MOSFETs) by using the finite element method (FEM) under different vibration effects. This board is exposed under different angles by a vibration machine

Cascaded Integrator-Comb filters are a popular choice of filter for use as an interpolator in FPGAs due to their efficient multiplierless design, such as within an on-board satellite communication module. Electronics in space have the problem of being highly susceptible to cosmic radiation, due to the lack of magnetosphere and therefore require some form of protection from Single Event Upsets (SEUs)

CMOS Image Sensors (CISs) can easily be susceptible to heavy-ion radiation in space applications. The sensitivity of Single Event Effect (SEE) in CIS is explored by heavy ion broad beam experiments and laser experiments. Pinned Photodiode (PPD) CMOS Image Sensors were exposed to heavy ions with Linear Energy Transfer (LET) (8.62–81.35 MeV cm2 mg−1). The digital peripheral circuits of CIS studied were

Semiconductor aging and its causes have been well understood, however until recently, aging has not been a design concern. The expected lifetime of integrated circuit (IC) components has been far longer than their intended applications. As device geometries are reduced, consideration early in the design process to aging and product lifetimes become more significant for successful IC design and development

Bi additions have been reported to improve the wettability and drop-impact performance. Most important of all, it improves the mechanical properties. However, few studies focus on the effect of the Bi addition on mechanical properties and microstructure of intermetallic compounds (IMCs) in solder balls, especially on those properties after current stressing. In this study, to understand the effect

A mathematical model is established to study the impact of nonlinear errors on the performance of cyclic analog-to-digital converters (ADCs) and imaging quality of CMOS image sensors (CIS). And a radix-based foreground digital calibration method for cyclic ADCs in large array CIS is proposed and modeled. The nonlinear errors caused by capacitor mismatch and finite operational amplifier (OPAMP) gain

The drop reliability of an M.2 module was investigated. The module is a next generation form factor of solid state drive. Considering the actual installation conditions in which the module is mounted on a main board with a socket and screw, three pairs of mounting fixtures including clamp were examined under the conditions that the module was directly mounted on a free fall drop table. Accelerations

Yttrium oxide (Y2O3) powder was used as an interface layer between metal (Al) and semiconductor (p-Si). Y2O3 powder was coated with a spin-coating method on the p-Si and the Al/Y2O3/p-Si Schottky Barrier Diodes (SBD) was fabricated. The electrical characteristics of the fabricated SBD were analyzed at various temperatures and compared with each other. While ΦB0 decrease from 0.931 eV to 0.211 eV, n

Among renewable energy sources the sun is certainly one of the easiest to exploit. Solar panels allow generating electrical energy but they generally have low efficiency. It is therefore important to optimize a solar module to maximize its energy production. Faults can have for example a big impact on the amount of energy production, and should be avoided if possible. This goal can be achieved by designing

Gold electrode is preferable in extreme environments, but few reports focus on gold electrode for LTCC application. In this article, CaO–B2O3–SiO2 glass powder used in the gold paste with different particle size was prepared. The sintering shrinkage behavior of CaO–B2O3–SiO2 green tapes and gold paste were investigated. The blisters of gold electrode and corresponding mechanism during sintering process

In this work, we report on the development of a methodology to study the reliability of digital circuits implemented in FPGA. For this, the design and simulation tools have been extended to introduce aging. The aging laws for Look-Up Tables, describing the drifts in the propagation time, caused by Hot Carrier Injection and Negative Bias Temperature Instability degradation mechanisms, have been integrated

Bias Temperature Instability and soft error rate are the major reliability issue with the technology scaling. BTI leads to an increase in the threshold voltage of the MOS transistors, which reduces the drain current. The threshold voltage of the PMOS transistor increases due to NBTI with stress time, which degrades the circuit performance. In this paper, we propose a novel reliable voltage bootstrapped

There is a growing demand for using commodity memory and storage solutions to make commercial aerospace ventures economically feasible. Existing radiation-hardened computer systems cannot meet this need alone. These hardened systems provide sufficient protection against the harsh environment of the upper atmosphere and low-Earth orbit, but require dramatically increased cost and utilize commercially

Circuits for the hardware acceleration of cryptographic algorithms are ubiquitously deployed in consumer and industrial products. Although being secure from a mathematical point of view, such accelerators may expose several vulnerabilities strictly related to the hardware implementation. Differential fault analysis (DFA) and hardware Trojan horses (HWTs) may be exploited to steal secret information

Hardware-implemented machine learning algorithms are finding their way in various domains, including safety-critical applications. This has demanded these algorithms to perform correctly even in harsh environmental conditions, such as in avionics altitudes. Support Vector Machine (SVM) is an important Machine Learning that has been target of hardware implementation in recent years. This is the first

We studied the radiation response of 3 different 65 CMOS planar technologies at the ultra-high doses expected to be reached in the HL-LHC, the upgraded large hadron collider of CERN. All the processes studied are sensitive to radiation and show similar degradation mechanisms and, albeit with different intensities, similar dependencies on device geometry, applied polarization and temperature. The results

IGBT has multiple degradation mechanisms. The existing methods using a single characterization parameter cannot characterize the comprehensive health status of the device, but multiple characterization parameters cannot quantify and intuitively reflect the comprehensive health level. Therefore, this paper proposes a characterization method of IGBT comprehensive health index (CHI) based on online status

Recently, Cu interconnect and low-k materials have been applied to reduce the interconnect resistive-capacitive delay issue. However, as the process node size is reduced to a few nanometers, high leakage currents appear through the dielectric under high electric fields. Therefore, issues of Cu diffusion at the interface between the dielectric and the capping layer have been reported. This study investigated

Soft errors due to radiation-induced multi-bit upsets (MBUs) are very prominent in the present flash memories built with ultra large scale VLSI technology. Use of multi-level cells in flash memories increase the chance of adjacent MBUs or clustered error. Single bit error detection and correction (EDAC) codes are not enough to mitigate the effect of clustered error due to their small error correction

The ionizing radiation response of a kind of commercial n-channel VDMOSFETs irradiated without external electric field stress is investigated. The effects of total dose, dose rate and H2 ambient on the radiation response, and the post-irradiation annealing behaviors of the devices have been explored. The devices are degraded obviously after 1200 Gy (Si) γ radiation. No appreciable true dose rate effect

Thin films of lead sulphide (PbS) were grown on the Si (100) and glass substrates using the simple chemical bath deposition (CBD) method. The prepared films had the cubic structure at room temperature, and the thickness was 350 nm at a 120 min deposition time. In this work, the effect of low-dose rate gamma irradiation on the structural and optical characteristics of the prepared thin films was investigated

Dielectric properties of amorphous semiconductor has been observed in the frequency range of 1 kHz – 1 MHz and a temperature range of 300 K–370 K. Dielectric dispersion is observed in the present samples which is dipolar in nature. The decrease in the dielectric parameter with Sulfur concentration may be due to the decrease in density of defect states. DC conduction loss is smaller than the observed

We conducted experimental and quantitative studies on the effects of off-state bias stress of the p-type polycrystalline silicon thin film transistors, and present a degradation model using spatial mapping simulations. In the off-state bias stress condition, the gate induced drain leakage current (GIDL) is determined by the gate and drain voltage (Vgd), and the gate bias stress above a certain bias

Electronic components have changed the way we live and the way we use technology since they were first introduced into products. Most equipment is only as reliable as its internal electronic components. In electronic integrated circuit (IC) components, wire bonding is the most common first-level interconnection method between die and lead. Failure of wire bonds can have very costly consequences in

As the successor of soldering, the press-fit electrical connection is more and more widely used on account of a number of advantages, such as fast assembly. However, in practice, some contact failures were found. Most of the failures are related to the force which the structure bears. Because of complex elastic-plastic deformation characteristic, analyzing the mechanical behavior of the press-fit is

A cryogenic investigation of the Cgs (Vgs) and the transfer Ids (Vgs) characteristics is suggested to monitor the evolution of the pinch-off voltage Vpinch-off of the AlGaN/GaN HEMTs transistors. An excessive gate leakage current of 117 mA has been identified from Igs (Vgs) measurements from 60 to 320 K. We have found that the negative shift of the Vpinch-off voltage was induced by an electron trap

The 16.6 Ω implementation of contact CDM (LICCDM) recently published in ANSI-ESD Standard Practice 5.3.3 is shown to produce waveforms of similar shape, Ifail, and Ipeak vs. CDUT dependency as JS-002. The non-monotonicity of JS-002 at low voltages is overcome using LICCDM. A path to joint standardization with air discharge testing is proposed.

In this study, high pressure H2O annealing (HPA) was performed to improve the reliability of low temperature poly-Si thin film transistors (LTPS TFTs) fabricated on a polyimide (PI) substrate. Due to the low heat resistance of the PI substrate, the pressure was high to reduce the temperature of the heat treatment. HPA was performed at 130 °C and 0.3 Mpa in an H2O ambient for 2 h. After HPA treatment

This study evaluates the impact of intermetallic compound (IMC) thickness on thermo-mechanical reliability of lead-free SnAgCu solder joints in crystalline silicon solar cell assembly with regard to fatigue life. Finite element modelling is used to simulate the non-linear thermo-mechanical deformation of the joints. Five geometric models of solar cell assemblies with different IMC thickness layers

Properly assessing the underlying physics of failure is critical in predicting the long term reliability of electronic packages in their intended field applications, yet traditional reliability demonstration methods are complicated by time and cost considerations as well as deterministic inadequacies when considering thermomechanical failures. In this work, an alternative reliability testing apparatus

The COTS power transistors based in GaN were exposed to TID effects by 10-keV X-rays. These HEMTs were tested in the On- and Off-state bias conditions. Switching tests were performed before and after irradiation steps. The devices were characterized at temperatures ranging from −50 °C to +75 °C. The results indicate that the GaN-technology is a great candidate to be used in harsh environments, because

In this paper, the degradation mechanism of RF performance of 130 nm T-gate partially depleted (PD) silicon-on-insulator input-output nMOSFETs at different total ionizing dose levels has been investigated. RF figures of merit (the cut-off frequency fT, maximum oscillation frequency fmax) show significant degradation, about 26% and 80% respectively. The variation of the small signal parameters (output

Single event burnout (SEB) of NLDMOSFETs on SOI initiated by pulsed laser irradiation is demonstrated for the first time. The sensitive region of the device for SEB and the effects of reverse voltage and laser energy are explored. The data indicate that the device is most sensitive to laser pulses in the drift region near the P-well. This is influenced by the electric field distribution in the drift

Gate-stack reliability has been a major roadblock in the realization of InGaAs-channel based logic technology. Excessive charge trapping in the gate-oxide causes time-dependent drift in transistor threshold voltage (Vth). The extent to which Vth drifts under certain stress conditions depends on (i) the defect ground-state energy distributions in the oxide bandgap, and (ii) the specific activation energy

Due to the increasing miniaturization of microelectronic packaging, the electromigration (EM) phenomenon generally exists in microscale lead-free solder joints, which is mainly caused by high current stressing. To address the limitation of experimental measurement at a microscale, this study performed a finite element analysis (FEA) based on microstructure simulation and image recognition to characterize

The elastic-plastic and low-cycle fatigue behaviors of copper films are studied experimentally and identified for further simulation works. A rolled annealed copper grade is considered here, as it is often used in flexible printed circuit boards for its mechanical resistance to high elongations. During operation, the printed circuit board (PCB) will undergo various loadings, whether purely mechanical

The field emission and resulting breakdown induced damage in the actuation paths of MEMS capacitive switches are investigated. The effect of asperities burning due to Joule heating and the resulting explosive break down are presented. The breakdown gives rise to almost mirror craters formation on the cathode and anode electrodes. A linear relation between crater diameter and the breakdown current is

The aim of this work is to study the degradation processes in high power InGaN semiconductor lasers, by means of electrical, optical, spectral and capacitance deep-level transient spectroscopy measurements. The devices were submitted to two different stress experiments, (i) a constant current stress at 1.5 A and 45 °C, and (ii) a temperature/bias step stress at 1 A and increasing temperature. Results

This paper examines the robustness of pressure sensors fabricated with the M&NEMS technology at high temperature for industrial applications. Thermal cycling up to 522 °C showed good reproducibility of results. Comparison of sensor sensitivity before and after thermal cycling was very satisfactory with a variation in the range of 4–5%. The wafer level packaging of the sensor withstands very well these

In this paper, different reliability simulation approaches of an improved DC current flow controller (CFC) integrated voltage-sourced converter (VSC) based DC grids are investigated with the following contributions: (1) In order to achieve bidirectional power flow control and fault current blocking capability, an improved DC CFC topology with a set of reversed switches is analysed to enhance the controllable

This article presents a new asynchronous early output 3-input majority voter that is used to realize a high-speed, low power and less area occupying relative-timed asynchronous TMR implementation. The proposed majority voter is used to realize an asynchronous TMR implementation and it is compared with asynchronous TMR implementations realized using other asynchronous majority voters. The dual-rail

This paper proposes a new scheme to improve the reliability and reading yield of ultralow-voltage static random access memory (SRAM). The proposed scheme utilizes an error detecting sense amplifier (ED-SA) to constrain SRAM access timing, which combines timing error detection (TED) and correction. ED-SA applies different threshold transistors into the input terminals and regulates input offsets (Voffset)