A Cu-cored solder ball (CCSB) is often used as the interconnection material for 3D package. The CCSB has a Cu core surrounded by Sn-Ag-Cu alloy. The effect of the Cu core on mechanical reliability of the CCSB was investigated using thermal shock test. Microstructure and thermal shock reliability of the CCSB with organic solderability preservative (OSP) surface finish was compared with that of Sn-3

Chip–package interaction (CPI) has become an increasingly important reliability issue in the microelectronics industry. In order to survive the thermally induced stresses during processing or working lifetime, the complex back-end-of-line (BEOL) layer stacks must have sufficient mechanical strength. The understanding of accelerated mechanical tests performed at wafer level, such as shear microprobing

This paper describes a comprehensive analysis of the degradation mechanisms of green InGaN based high-power LEDs. The combination of electrical, optical and thermal measurement allows a separation of the degradation mechanisms and their influence on the performance of the devices. The results show that the LEDs have parasitic diodes in their initial state, which influence increases over the aging period

This paper reviews the feasibility of the state-of-the-art electrical techniques adopted from Si technology for characterization of SiC MOS devices. The inability of these conventional characterization techniques to correctly evaluate the trap capture cross section and field-effect mobility in SiC MOS devices are investigated and explained. As near-interface traps (NITs) are an important cause of field-effect

We investigate the effect of TID electron irradiation on a 65 GHz LNA in 130 nm SiGe BiCMOS. The LNA is exposed to a Sr-90 radiation source and irradiated at a rate of 200 krad (Si)/hr to a total dose of 15 Mrad (Si), with S-parameter and NF measurements taken at regular intervals. It is found that TID produces and increase in the input impedance, especially in the reactive component. The damage results

A novel space vector modulation (SVM) strategy called maximum-boost discontinuous SVM (MBDSV) is proposed in this paper to reduce the thermal stress of three phase impedance source inverters (ISI). By exploiting the switch clamping mechanism and arranging the shoot-through (ST) states properly, the proposed strategy obtains the flowing merits: further optimize the thermal performance, improve the reliability

Moisture induced failure is one of the major reliability concerns in electronic packaging. This research provides a comprehensive solution for modeling the moisture induced delamination in electronic packaging during solder reflow. Existing finite element approaches of studying the moisture and vapor pressure induced package delamination issue were discussed, reviewed, summarized and integrated into

The Dual-Core Lockstep configuration is largely employed in safety-critical System-on-Chips for the sake of compliance with functional safety standards. Such configuration includes two processor cores paired together, always fed with the same identical inputs and their outputs are continuously compared by a set of comparators. However, permanent faults affecting the comparators may invalidate the system

Considering shock loading on the MEMS microphone is necessary for its reliability assessment since drop of portable devices is a common situation. In this study, the stress distribution and the failures of MEMS capacitive microphone chip by TSMC 0.18 μm CMOS process, with 4 by 3 microphone array under shock loading (peak acceleration 1500 g) and shock plus static electricity loading were investigated

This study investigates a time-reduced sintering process for die attachment, prepared, within a processing time of several seconds using dry nanosilver film. The effects of three main sintering parameters, sintering temperature (220 to 300 °C), sintering time (1 to 9 s) and bonding pressure (6 to 25 MPa) on the resultant shear strength are investigated using uniform design and single factor experimental

As the chip power densities increase radically with scaling, thermal gradients are predicted to become a major reliability concern in interconnects compatible with the 3 nm technology node and beyond. In this study, the impact of temperature gradients on the reliability of Cu nano-interconnects with highly scaled linewidth of 10 nm is simulated using a Korhonen-type modelling framework previously calibrated

A dedicated experimental setup is presented for the acquisition of single ionization events generated in power devices by ionizing radiation. This spectrometer chain is designed to be used for long-term experiments, where devices are submitted to the natural terrestrial cosmic radiation (TCR), for TCR characterizations, as well as in conjunction with radioactive sources. Every single ionization event

In nMOS transistors the impact of positive bias temperature instability (PBTI) on the device performance is typically considered negligible and has thus been barely studied in the past. However, an accurate description of this phenomena requires and in depth understanding of the physical origin being responsible for the change of the device characteristics over time. For the assessment of PBTI in nanoscale

A DDR3 SDRAM test setup implemented on the Griffin III test system from HILEVEL Technologies is used to analyse the row hammer bug. Row hammer pattern experiments are compared to standard retention tests for different manufacturing technologies. The row hammer effect is depending on the number of stress activation cycles. The analysis is extended to an avoidance scheme with refreshes similar to the

Under unclamped inductive switching (UIS) condition, the distribution of avalanche breakdown current in insulated gate bipolar transistor (IGBT) is non-uniform. Many previous studies have shown the results of calculating current distribution and behavior using a device simulator. As a result of experimental observation, there are some reports that the temperature change of the device was observed by

The successive oxide failure statistics theory that arises from the clustering model is used for investigating the time-to-breakdown distributions of Al2O3/HfO2-based nanolaminates. These gate dielectrics in metal-insulator-semiconductor structures are intended to combine a high injection barrier material (Al2O3) with a high-K material (HfO2). When a constant voltage is applied to the structures, the

In this paper, an experimental and numerical study of the electrical ruggedness in double-sided cooled power modules is presented. In particular, the analysis focuses on the role of the spacing between substrates, which are commonly kept distant to avoid electrical failures like partial discharge and dielectric breakdown. To this aim, many double-sided cooled assemblies were manufactured and then tested

PV (Photovoltaic) power systems have been rapidly installed and spreading worldwide in recent years. And there is a belief that the PV power plant will operate stably for more than 25 years. However, the PV modules have an unexpected failure. In this paper, we diagnosed a 10-year-old power plant using drone with infra-red (IR) camera, current-voltage (I-V) and electroluminescence (EL) measurement.

In this work a new concept of liquid cold plate for high power press-pack assemblies is investigated. In industrial applications it is very important to reduce the volume and weight of the device-heatsink stack, in order to improve reliability and availability of the whole system. The potential of aluminum additive manufacturing technology is investigated by means of coupled thermal fluid-dynamic 3D

Due to the increasing demand for high performance in embedded systems, devices such as SRAM-based programmable devices are becoming an appealing solution to reach high performance with limited costs. However, SRAM-based programmable devices are subjected to various sources of radiation-induced faults that affect their reliability, such as ionizing radiation and particles, even at sea-level. In this

UMOSFET on-resistances have been dramatically improved in recent decades with the miniaturization of cell size by innovations in the fabrication process. However, with miniaturization, failure in the gate oxide, large deviations in the threshold voltage and reductions in avalanche capability have emerged as design problems for mass production. In particular, threshold voltage increase have appeared

Scratchpad memories (SPMs) are intensively utilized in modern embedded processors where a demand on improving reliability without compromising performance-predictability and area/power efficiency is on rise. Our observations imply that one target for this reliability improvement is to combat ever increasing threats of multiple bit upsets (MBUs) occurring in the SPM addresses as well as multiple event

This paper proposes a study on the resilience to radiation of MEMS sensors based on piezoresistive transduction by means of suspended silicon nanogauges. It is particularly interesting for applications in severe environment like in space or in nuclear plant. This work shows that the resistivity of a single nanogauge exhibits a sensitivity of 16.5 ppm/kGy whereas the silicon nanogauges bridge used for

This work presents an in depth investigation regarding the effect of PECVD silicon nitride (SiNx) stoichiometry on its charging mechanisms. The investigation took place in SiNx dielectric films with different Si-content (x = 0.47–1.04) with the aid of Metal-Insulator-Metal capacitors. The experimental assessment involved a single-point Kelvin probe System, the monitoring of Current – Voltage characteristics

Multilayer polymer aluminum electrolytic capacitors represent one of the most recently developed capacitor technology; this paper presents a reliability analysis of multilayer polymer capacitors in elevated-temperature and humidity applications (85 °C). Three groups of capacitors were selected and tested at two different environmental conditions (85 °C/85% RH and 110 °C/85% RH with rated voltage bias)

Spin-transfer torque (STT)-magnetic random access memory (MRAM) requires yield-aware design for hybrid magnetic-CMOS integration. In this paper, a novel cycle-sensing margin enhancement (CSME) scheme with pMOS assisted voltage-type sense amplifier (p-VSA) is proposed to alleviate imperfect process induced performance fluctuations. With iterated charging-discharging through non-volatile data path and

Reliability testing of Si power semiconductors has had a long history and has resulted in a good predictability of standard degradation-mechanism tests such as power cycling. To enable a rapid adoption of SiC MOSFETs into the mass market, application stress tests have also been carried out. In order to validate robustness, and assess end-of-life behavior, it is necessary to monitor performance-relevant

Aiming at the inaccurate problems of lifetime prediction and reliability evaluation of 3D Trinary-Level Cell (TLC) NAND flash memory, a method to evaluate the remaining lifetime and the reliability of flash memory based on the threshold voltage distribution is proposed. In order to analyze the impact on Program/Erase (P/E) cycles on the flash memory from the perspective of voltage distribution, a complete

The complete percentile lifetime models are essentially required for a mission profile based reliability evaluation of power modules. However, the information on the complete lifetime models or lifetime data of power modules is rarely fully provided by manufacturers. The Monte Carlo method is a good solution to obtain the time-dependent reliability function when only limited lifetime information such

Connected mobile applications, known as the Internet of Things (IoT), require deploying extensive efforts to optimize power consumption and to improve the system performance at the same time. One way to reach this goal is based on sacrificing the computing precision by adopting different approximate computing methodologies for boosting system performance and reducing the power consumption. In this

This paper proposes a system-level prognostic approach for power electronic systems with slow degradation profiles. Although a model-based approach has been adopted to deal with such multivariable dynamical systems with degradation properties, the forecasting of the Remaining Useful Life (RUL) is independent of prior knowledge of degradation profiles. Thus, this proposition is mainly based on the estimation

A vast range of electronics products have utilized 2.5D packages for better performance and miniaturization. As multi-level assembly technologies are getting mature, 2.5D packaging technology becomes affordable. In this work, design guideline for board-level reliability of a 2.5D package was provided with respect to accelerated thermal cycling (ATC) and power cycling (PC). Finite element models were

Microelectronic packages continue to become smaller and more complex. Interfacial delamination is a common failure mechanism present in microelectronic packages due to the mismatch in the coefficient of thermal expansion (CTE) between different materials. Epoxy Molding Compound (EMC)/copper is a common interface found in microelectronic packages and is susceptible to delamination due to CTE mismatch

Recent developments in high-tech industries have led to integrated circuits that are used increasingly in most of the critical applications such as medical supervisory systems and space applications. These systems are facing two major challenges, namely reliability and timing requirements. In other words, these systems have to operate correctly while meeting timing requirements even in the presence

A comprehensive analysis of the quantization error in spike-frequency-based image sensor is presented. The image sensor generates different frequency spikes under various light. Images can be reconstructed from spikes by counting the spike number in an integration period, however, this method will generate quantization error. Firstly, the quantization errors introduced by nonlinearity, comparator operation

Reliability predictions are routinely performed according to mission profiles, in photovoltaic applications including at least irradiance and temperature. This paper is aimed at assessing the necessity of including humidity meteorological data in the mission profile. A DC/DC soft-switching converter rated at 1 kW, and aimed at PV applications is selected as case study. Its reliability is predicted

This paper presents a new single event transient hardened complementary delay cell (SET-H CDC) for radiation environment. The performance of the proposed topology has been compared with the existing radiation-hardened delay cell topologies called wide tuning delay cell and complementary delay cell (CDC). A three-stage VCO has been designed with each of the delay cell topologies for low power consumption

Using wetting balance method, the wettability of Ni-based amorphous and crystalline alloys by Sn and Sn-based solders (Sn-0.7Cu, Sn-0.3Ag-0.7Cu, and eutectic SnPb (E-SnPb, Sn63Pb37)) was evaluated at 290–310 °C. Among these solders, Sn shows the best wettability with amorphous alloy because of the strongest interfacial reactivity for oxide film removal, and E-SnPb shows the best wettability with crystalline

In this work we propose a system which is able to actively control the temperature of a power MOSFET, in order to limit the temperature swing and hence to reduce the power/thermal cycling effect. To this purpose a dedicated driving circuit, allowing to control the gate voltage of the switching device under investigation, is used in a synchronous buck converter. Therefore, power losses can be modulated

As the continuous miniaturization of integrated circuits (ICs), 3D integration technology becomes one of mainstream methods, in which copper pillar micro-bumps play significant role in the interconnection. In this paper, the effect of intermetallic compound (IMC) thickness on mechanical fatigue properties and fatigue life of Cu pillar micro-bumps was systematically investigated. Specifically, different

This paper reports on the reliability of RF MEMS switches operating in a cryogenic (<6 K) environment while monitoring the repeatability of their contact resistance (Rc) over time. Series DC-contact switches were actuated with a bipolar waveform then checked for stiction every 100 thousand contacts, and after every million cycles Rc was measured 100 times. Device lifetimes were limited to under 10

Neuromorphic computing architectures are required to execute several operations such as forgetting and learning behaviours with high-speed data processing. Due to the rapid advancement in technology, various transistor-based devices like field-effect transistor (FET), complementary metal-oxide-semiconductor (CMOS), etc. have the limitation to perform efficiently with a higher density of integration

Herein, ambient effects on electrical characteristics of p-type MoTe2 FETs under DC and pulse mode measurements were systematically investigated. As a result of reduced hole concentration in a high vacuum condition, threshold voltage increased as compared to air condition. Moreover, reduction of charge trapping and scattering in vacuum condition leads to electrical performance improvement such as contact

In this paper, we aimed to investigate the reliability of an organic light-emitting diode (OLED) and propose a SPICE compatible electrical model for automotive exterior lighting applications. The proposed model smoothly provides the forward and reverse current-voltage relation and also dynamic capacitive behavior of OLED is included in the model. The Automotive Electronics Council-Qualified (AEC-Q)

The characterization of commercial-grade power transistors upon high levels of particle irradiation is required to enable radiation tolerant LED power supplies for the new luminaires of CERN accelerator tunnels, which represent a harsh environment for semiconductor devices. This work describes the effects of 24 GeV/c proton irradiation on commercial GaN hybrid-drain-embedded gate injection transistors

Conducting negative bias temperature instability (NBTI) stress/recovery experiments on n-type metal-oxide-semiconductor-field-effect-transistors (n-MOSFETs), we have been able to reveal the existence of turn around phenomenon during stress phase. At first stage of stress, threshold voltage (Vth) shifts positively, followed later by a negative shift. Furthermore, recovery phase has shown, for the first

Highly accelerated life testing (HALT) is a test method used to expose design weaknesses at early stages of product development cycle by testing products under elevated stresses. Similarly, highly accelerated stress screening (HASS) is a widely accepted production test derived from HALT used to detect manufacturing defects jeopardizing product reliability. Despite wide usage of HASS, there is no clear

We present experimental results of the cross-section related to cosmic-ray irradiation at ground level for minimum-sized six-transistor (6T) and eight-transistor (8T) bit-cells SRAM memories implemented on a 65 nm CMOS standard technology. Results were obtained from accelerated irradiation tests performed in the mixed-field irradiation facility of the CERN High-energy Accelerator test facility (CHARM)

In this study, the mechanical integrity of novel back-end-of-line (BEOL) with ruthenium nanowires and airgaps was investigated using a combination of nano-indentation, delamination tests and finite element modelling. The ruthenium interconnects with and without airgaps were benchmarked against standard dual damascene copper BEOLs. The impact of interconnect aspect ratio, adhesion promotion at the metal-dielectric

The purpose of this paper is to make a comprehensive understanding of the trends between the lifetime and the thermomechanical test setup parameters, based on the physical failure mechanism of SnAgCu solder interconnections in the component boards. The thermomechanical tests, including thermal cycling and thermal shock, were employed to investigate the failure of the component boards under different

The stability and reliability at high temperature of Ti3SiC2 based ohmic contacts on p-type 4H-SiC (0001) 4°-off substrates were studied. The contact was grown from Ti100-xAlx alloys annealed at high temperature (from 900 °C to 1200 °C). The Specific Contact Resistance (SCR) at room temperature and at high temperature (up to 600 °C) was in the 10−4–10−5 Ω.cm2 range. A Schottky barrier height of 0.71

This work proposes an adaptive dc-link voltage strategy applied to a double-star chopper cell-based static synchronous compensator (DSCC-STATCOM). The proposed technique aims to improve the converter reliability by controlling the cell reference voltage according to the minimum voltage required in each STATCOM operation condition. It is important to remark that the proposed strategy does not require

In this paper, we investigate the single and repetitive avalanche performance and characteristics of different SiC device technologies including SiC cascode JFETs and SiC Trench MOSFETs. SiC Cascode JFETs exhibit a different failure mode from SiC MOSFETs due to the interaction between the low-voltage (LV) silicon MOSFET and the high-voltage (HV) SiC JFET through the resistance connecting the MOSFET

The reliability data are very useful in maintenance operations since they are used to calculate the Mean Time To Failure. However, they are rarely used for the online calculation of the Remaining Useful Life (RUL). This is because the features measured in the reliability tests are not always measurable online. In this paper, the proposed solution is usage of physical knowledge of the components to

This paper discusses the edge termination design of high-voltage insulated gate bipolar transistors with large current turn-off switching operation. We discovered that the phenomena of current crowding and impact ionization act as separated heat sources and induce one local hot spot that causes thermal destruction in the edge termination during the turn-off switching period. Optimizing the backside

Gold coating is one of the choices to prevent copper circuit in PCBs from corrosion. Although galvanic replacement deposition is supposed to be a convenient method to prepare gold coating on copper circuit, compact gold coating is hard to be obtained through traditional galvanic replacement deposition. In this work, gold coatings were prepared on copper substrates through traditional and modified galvanic

Changes in both surface morphology and transient reflectance on the front facet of a diode laser are monitored during a catastrophic optical damage (COD) process in a single pulse operation. Use of a 1550 nm time-resolved micro-reflectance optical system (with time resolution of ~4 ns) allows us to monitor the creation sequences of up to four distinct COD seed points on an 808 nm laser facet within