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Prof. Shoou-Jinn Chang has decided to step down from the editorial board of IEEE Electron Device Letters. On behalf of authors, staff, readers, and fellow editors, I would like to express appreciation for his diligent service to the journal over the past four years.

It is my pleasure to welcome Dr. Uwe Schroeder to the Editorial Board of IEEE Electron Device Letters. A biography and sketch of Dr. Schroeder’s research interests can be found below. His subject areas are emerging technologies and devices, and memory devices and technology.

A low equivalent-oxide-thickness of 0.58 nm and a low gate leakage current density of $\sim 2\times 10^{-{5}}$ A/cm 2 at V G = V FB – 1 V in p-substrate Ge (pGe) MOS device can be simultaneously achieved by a hydrogen plasma (H * ) treatment on GeO 2 interfacial layer (IL). It is found that the removal of GeO x with low oxidation state in GeO 2 IL play crucial roles on electrical characteristics of

In this work, we demonstrate vertical Ge gate-all-around (GAA) nanowire pMOSFETs fabricated with a CMOS compatible top-down approach. Vertical Ge nanowires with diameters down to 20 nm and an aspect ratio of ~11 were achieved by optimized Cl 2 -based dry etching and self-limiting digital etching. Employing a GAA architecture, post-oxidation passivation and NiGe contacts, high performance Ge nanowire

In this work, we have demonstrated high-performance lateral $\beta $ -Ga 2 O 3 metal-oxide-semiconductor field-effect transistors (MOSFETs) with state-of-art power figure-of-merit (P-FOM) and breakdown voltage (BV) by adopting a T-shape gate field-plate and source connected field-plate structures. Depletion-mode (D-mode) $\beta $ -Ga 2 O 3 MOSFETs with gate-to-drain distance ( $\text{L}_{\sf GD}$ )

A backward diode consisting of all nondegenerate and transparent semiconducting oxides (TSOs) offers promising opportunities for designing multifunctional electronic devices. In this letter, we report the backward diode rectifying behavior in the nondegenerate AgCrO 2 /In 2 O 3 p-n heterojunction. Both AgCrO 2 and In 2 O 3 films are transparent. The decrease of grain boundary in the In 2 O 3 film can

In this work, we demonstrate a GaN-based $\textit {p-n}$ junction gate (PNJ) HEMT featuring an ${n}$ -GaN/ ${p}$ -GaN/AlGaN/GaN gate stack. Compared to the more conventional ${p}$ -GaN gate HEMT with a Schottky junction between the gate metal and ${p}$ -GaN layer, the $\textit {p-n}$ junction can withstand higher reverse bias at the same peak electric-field as the depletion region extends to both the

Through oxygen profile engineering, we fabricated W/AlO $_{\mathbf {x}}$ /Al $_{\mathbf {{2}}}~\text{O}_{\mathbf {{3}}}$ /Pt bilayer memristors with a 250-nm feature size. The AlO $_{{\mathbf {x}}}$ fabricated by sputtering serves as an oxygen vacancy source, whereas the Al $_{{\mathbf {{2}}}}~\text{O}_{{\mathbf {{3}}}}$ deposited by atomic layer deposition acts as a dominant resistive switching (RS)

In this letter, physically transient resistive memory devices based on MgO with programmable switching behaviors by embedding Mo nanolayer were proposed. The devices with a 2-3 nm Mo nanolayer (W/MgO/Mo(2-3 nm)/MgO/W) exhibit bipolar analog switching behavior and synaptic functions that are promising for neuromorphic electronics. When the Mo nanolayer is increased to 7-8 nm, complementary resistive

Medium states are common anomalies in spin-transfer torque magnetoresistance random access memory (STT-MRAM). In this work, these medium states are systematically studied using an ultrafast characterization system and compared with the normal parallel (P) and antiparallel (AP) states. The medium states that exist in the switching processes both from the AP state to the P state (AP2P) and from the P

In this work, the influence of anion composition on the photoresponse characteristics of zinc oxynitride thin film transistors is investigated and compared directly to conventional In-Ga-Zn-O TFTs. Increasing the ratio of N to (N+O) led to higher field effect mobility and improved subthreshold swing. The subgap density of states extracted by monochromatic photonic capacitance-voltage measurement indicated

This paper analyzes the effect of high current under illumination stress (HCIS) in self-aligned amorphous indium gallium zinc oxide transistors with Al 2 O 3 as high- $\kappa $ gate dielectric. A negative parallel threshold voltage $({V}_{T}$ ) shift with the appearance of hysteresis $(\Delta {V}_{{hys}})$ is observed after HCIS. In contrast to the double ionized oxygen vacancy ( $\text{V}_{\text O}^{\text

In this work, we studied the effects of post annealing process on the electrical performance and positive bias stability (PBS) of aluminum-zinc-oxide (AZO) thin film transistors (TFTs). Among all the devices, the TFT annealed in vacuum atmosphere exhibits excellent I-V characteristics, such as a saturation mobility ( $\mu _{{{\text {sat}}}}$ ) of 45.90 cm 2 / $\text{V}\cdot \text{s}$ , a steep subthreshold

A hole-controlled lateral insulated gate bipolar transistor (HC-LIGBT) device with an ultrafast turn-off speed is investigated and experimentally demonstrated. Utilizing a high-permittivity material as the dielectric on the novel device structure, the hole carrier movements are controlled. In the device ON-state, the anode plasma injection effect is amplified to improve the current density. In the

In this work, fast sweeping characterization with an extremely short relaxation time was used to probe the ${V}_{\text {TH}}$ instability of p-GaN gate HEMTs. As the ${I}_{\text {D}}$ - ${V}_{\text {G}}$ sweeping time deceases from 5 ms to $5~\mu \text{s}$ , the ${V}_{\text {TH}}$ dramatically degenerates from 3.13 V to 1.76 V, meanwhile the hysteresis deteriorates from 22.6 mV to 1.37 V. Positive

In this letter, an improved measurement method for power transistors is proposed to obtain drain-current characteristics as a function of drain-source voltage ( ${I}_{\text {d}}$ – ${V}_{\text {ds}}$ ) in high-voltage and high-current (HVHC) ranges. A simple double pulse test (DPT) is utilized in our previous method. However, the self-heating of the device under test (DUT) is not ignorable in the range

An enhancement-mode hydrogen-terminated diamond field-effect transistor (FET) is realized by using a low work function gate material, namely, lanthanum hexaboride (LaB 6 ). The reason for the enhancement mode should be that the electrons in the LaB 6 layer flow into the two-dimensional hole gas (2DHG) channel and compensate the holes, such that the channel is shut down. The threshold voltages ( ${\mathrm

Shortening channels to the feature length of polymer domains is important to understand the charge transport in semiconducting polymers from macroscopic to microscopic scales. In this work, we fabricated polymer transistors with sub-domain-size channels by electron-beam lithography and asymmetrically aligned domains by off-center spin coating, in which a dry self-patterning method with hexagonal boron

In this letter, we report a performance enhanced thermopile with rough dielectric film black. The pyramidally-textured structure is in-situ formed in the thin dielectric film as an infrared absorber by hard-molding method. Compared to flat dielectric film-based thermopile with the same size, the output voltage, responsivity, and detectivity of the thermopile with rough dielectric film black can be

In this letter, we demonstrate a fully inkjet-printed electrochemical lactate sensor. The sensor is inkjet-printed on a flexible substrate, Kapton film, where silver nanoparticles (Ag NPs) are printed as conductive electrodes. The working and reference electrodes of the sensor are Ag NPs/NiO NPs/Polyurethane (PU) and Ag/AgCl (s) /PU layers respectively. The inkjet-printed PU film can not only prevent

Temperature sensor using series GaN Schottky barrier diode (SBD) with TiN anode was fabricated and evaluated extensively. The diode presents good characteristics in a wide temperature range from 25 °C to 200 °C. The temperature dependent forward voltage of the conventional 8-finger SBD at a fixed current shows good linearity, resulting in a sensitivity of approximately 1.14 mV/K. On the other hand

In this letter, we propose the photo-responsible synaptic devices by using stackable GaAs photodetectors (PDs) and Ge-on-insulator (Ge-OI) synaptic transistors for the future three-dimensional (3D) artificial vision sensors. The photo-responsible synapse showed good photo-responding synaptic behaviors depending on the incident light to GaAs PD, which changes the hole injection into the Ge-OI transistors

We prove the ability of a gravimetric sensor consisting in an AlN-based solidly mounted resonator (SMR) operating in the shear mode to decouple mass detection from temperature variations. This is achieved by simultaneously monitoring both the resonant and antiresonant frequency of the shear mode during a detection experiment subjected to temperature variations. These resonant and antiresonant frequencies

To generate high-power continuous-frequency tunable sub-terahertz radiation, a quasi-optical confocal waveguide is attempted as the interaction structure of a gyrotron. In experiments, a gyrotron operated in quasi-optical TE 06 mode generated a maximum output power of 20 kW when driven by a 50-kV, 3.4-A gyrating electron beam, and achieved a continuous-frequency tuning band of 205.66–208.97 GHz by

An energy-efficient tactile-sensing element composed of a triboelectric nanogenerator (TENG) and an electrolyte-gated synaptic transistor (EGT) is presented for biological tactile sensory neuron emulation. As the mechanoreceptor, TENG converts pressure signals into voltage pulses directly. The EGT is used as a neuromorphic device to emulate the behaviors of biological synapse. Typical functions of

High-current molecular beam epitaxial perovskite oxide semiconductor BaTiO 3 /BaSnO 3 heterostructure field effect transistors on SrTiO 3 substrates were developed. Record high current density of $\text{I}_{{\mathrm{max}}} =406.7$ mA/mm, maximum transconductance $\text{g}_{{{\text {m}}}} =72.3$ mS/mm were achieved in a field effect transistor with gate length $\text{L}_{{{\text {g}}}} = 0.64\,\,\mu

Non-volatile (NV) nano-electro-mechanical (NEM) switches are successfully implemented using multiple metallic layers in a standard 65 nm CMOS back-end-of-line (BEOL) process with no additional lithography steps. Non-volatile operation of a NEM switch as a reconfigurable interconnect to dynamically change CMOS circuit functionality is demonstrated.

Oscillatory neural networks based on insulator to metal transition of VO 2 switches are implemented for image recognition. The VO 2 oscillators are fabricated on silicon in a CMOS compatible process. A fully-connected network of coupled oscillators is investigated using programmable resistors as coupling elements. In this approach, input of the image information and data processing is performed in

This letter proposes a transfer learning (TL) method to generate neural network (NN) database to model doping and alloy. By leveraging the valuable potential energy surface (PES) information already available in source system and similarities between source and target systems, the proposed TL successfully reduces computational cost by several orders of magnitude, while keeping ab-initio level high

Effects of additional thermal budget associated with a three-dimensional (3D) fabrication sequence are evaluated for the total-ionizing dose radiation response of fully depleted silicon-on-insulator (FD-SOI) MOSFETs. Current-voltage and low-frequency (1/ ${f}$ ) noise measurements are compared for (1) conventional planar FD-SOI MOSFETs, and (2) MOSFETs formed in the bottom layer of the 3D process and

We investigated the thermal characteristics of a recently developed delta-doped $\beta $ -Ga 2 O 3 MESFET using thermoreflectance imaging technique, which enabled temperature measurement with ~250 nm spatial and ~400 ns temporal resolution. We measured the temperature contours on source, drain and gate pads, and estimated peak temperature at different bias conditions, and calculated the thermal time

This experimental study investigates a novel multi-functional one dimensional-two dimensional (1D-2D) heterojunction made of two different band-gap semiconductors, i.e. single-walled carbon nanotube (SWCNT) and tungsten di-selenide (WSe 2 ). The proposed ultra-scaled van der Waals junction behaves like a ${p}$ -type field-effect transistor (FET) or a gated ${p}$ - ${n}$ diode, depending upon the gate

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It is my pleasure to welcome Dr. Udayan Ganguly to the Editorial Board of IEEE Electron Device Letters. A biography and sketch of Dr. Ganguly’s research interests can be found below. His subject areas are memory devices and technology, silicon and column IV semiconductor devices, and emerging technologies and devices.

We propose an updated compact model for mobility in Nanosheet FETs. This is necessary since Nanosheet FETs exhibit significant mobility degradation with thickness and width scaling caused by centroid shift, changing effective mass due to quantum confinement as well as various crystal orientations of the various conduction planes. The model takes all of these effects into account. It has been implemented

This manuscript presents a systematic low–frequency noise analysis of inversion–mode vertically stacked silicon n–channel nanosheet MOSFETs on bulk wafers. Flicker noise due to carrier number fluctuations is shown as the dominant noise source, which is in line with previous reported studies on gate-all-around (GAA) nanowire nMOSFETs. In addition, the benchmark points out that the vertical stacking

In this letter, we present a multi-channel in-plane-gate field effect transistor (MC-IPGFET). In the proposed device, multiple vertically stacked two-dimensional electron gases (2DEGs) are simultaneously controlled by lateral in-plane gates formed with the same multi-2DEG stack. The multi-channel heterostructure allows to increase carrier density in the channel while keeping high electron mobility

A dopant-free p-type Al x Ga 1–x N (x = 0.1~0) layer, achieved by polarization induced three-dimensional hole gas, was introduced into the structure of AlGaN npn heterojunction phototransistors (HPTs) as the p-base. The fabricated HPTs with a junction diameter of $150~\mu \text{m}$ exhibit a sharp cutoff with a 360/375-nm rejection ratio of more than 3 orders of magnitude and a responsivity of $5\times

In this letter, we report a quasi-vertical GaN Schottky barrier diode (SBD) fabricated on a hetero-epitaxial layer on silicon with low dislocation density and high carrier mobility. The reduction of dislocation is realized by inserting a thin layer with high density of Ga vacancies to promote the dislocation bending. The dislocation density is ${1.6}\times {10}^{{8}}$ cm −2 with a GaN drift layer thickness

In this work, we have demonstrated normally-off $\beta {-}\text {Ga}_{{2}}\text {O}_{{3}}$ metal-oxide-semiconductor field-effect transistor (MOSFET) with the ferroelectric charge storage gate stack structure. Saturation currents of 18.3 and 16.0 mA/mm were achieved in Depletion (D–) and Enhancement (E–) mode device, respectively, which shows negligible current reduction. Steep subthreshold swing (SS)

AlGaN/GaN high-electron-mobility transistors (HEMTs) with Hr 0.5 Zr 0.5 O 2 ferroelectric gate stacks exhibiting significant ferroelectric switching for threshold voltage control are experimentally demonstrated. Ferroelectric gate HEMTs (FeHEMTs) with large threshold voltage tuning range of 2.8 V were obtained, with an on/off ratio of $\sim {10}^{{{5}}}$ based on a GaN-channel HEMT structure suitable

A 700-V normally-off ${p}$ -GaN gate power transistor with distributed built-in Schottky barrier diode (SBD) is demonstrated in this work. The transistor cell and diode cell are alternately arrayed along the device width and are locally isolated using ion implantations. The built-in SBD provides a low reverse turn-on voltage which is independent of the threshold voltage and gate bias of the transistor

This paper reports on the hot-carrier effects and semi-on-state behavior of nitrogen-polar GaN MIS-HEMTs at cryogenic temperatures (from 300 K down to 100 K). In the semi-on-state $(\text {V}_{\text {G}} \approx -{2}\,\,\text {V})$ , holes are generated by impact ionization in the high field region at the drain-side of the gate-edge. At room temperature, holes overcome the SiN/AlGaN stack and are collected

This letter reports on the improvement of the large-signal W-band power performance of nitrogen-polar gallium nitride deep recess high electron mobility transistors with the addition of a 40-nm-thick ex-situ silicon nitride passivation layer deposited by plasma enhanced chemical vapor deposition. The additional passivation improves the dispersion control allowing the device to be operated at higher

Memristor emerges as the key enabler for neural network accelerator. Here, we demonstrate high-precision symmetric weight update in a one transistor one resistor (1T1R) structure Ti/HfO 2 /TiN memristor using a gate voltage ramping method, with over 120-level states and low variation (< 4%). Incorporating all experimental non-idealities, the proposed mixed hardware-software convolutional neural network

In this experiment, the electrical performance of zinc oxide based-resistive random access memory (RRAM) is successfully improved by using annealing in ammonia hydroxide solution at low-temperature and high pressure to complete ammonium-doped ZnO based-RRAM. The results of material analysis indicate that using CO 2 as ammonia hydroxide carrier during the annealing process leads to the reduction in

This work experimentally demonstrates the memory operations of a $\text{Z}^{{2}}$ -FET (Zero impact ionization, Zero subthreshold swing) matrix without the use of selectors. Selection and deselection of memory cells in the same bit line can be controlled by modulating the front-gate voltage to prevent the use of a dedicated selector. Appropriate drain voltages to achieve two logic states need to be

This letter presents a general-purpose fully-atomistic method to simulate phase change memory (PCM), by combining density functional theory (DFT) and deep neural network (DNN). Its maximum calculation error of atomic forces is about 10 −1 eV/Å, which is 1–2 orders of magnitude more accurate than state-of-art artificial neural network (ANN) in PCM literature (over 10 1 eV/Å). Its simulation time, ${t}_{\text

This paper investigates the impact of the random ferroelectric-dielectric (FE-DE) phase distribution on the memory window (MW) of the ferroelectric field-effect transistor (FeFET) nonvolatile memory (NVM) with the aid of TCAD atomistic simulations. Our study indicates that the DE path from source to drain is detrimental to the MW, and down-scaling the gate length substantially increases the probability

We report the pulse dependent threshold voltage ( ${V} _{t}$ ) variation of the Ovonic Threshold Switch (OTS) and its effect on the read window margin (RWM) in Cross-Point Memory (XPM). We found that OTS ${V} _{t}$ varies by the height and width of the write-current pulse. The varied ${V} _{t}$ is persistently maintained even after 2E4 cycling of the write pulse, which means that the phenomenon is