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A novel high performance SiGe Body-On-Insulator (BOI) FinFET device fabricated on bulk silicon substrate is demonstrated in this letter. A key fabrication process of “isotropic etching + Ge condensation” is firstly proposed to simultaneously achieve localized insulator below SiGe Fin and suppressed diffusion of Ge atoms, as well as increased Ge content in the channel. The process is compatible with

For silicon carbide (SiC) power MOSFETs, threshold voltage drift is a remaining obstacle in their way to the market. This study experimentally investigates the drift under dynamic or switching gate stresses. It is shown that, beside static stress, the switching events can themselves be a driving force of the threshold voltage drift. However, this happens only when the dynamic gate stress is bipolar

The selection of design structure parameters is a critical step for meeting the performance requirement for silicon on insulator (SOI) lateral power devices, especially when multiple design constraints are presented. In this letter, we propose a fully-automated structural design method for SOI lateral power device based on a Bayesian optimization (BO) framework. Given the design target characterized

The TreeFET channel, which is a combination of vertically stacked nanosheet channels and fin-shaped interbridge channels in between the nanosheets, can provide an additional channel conduction area to improve the on-current without increasing the device footprint. To provide on-current enhancement, a minimum height is required for the interbridge that is dependent on the width of the interbridge and

According to quantum transport simulations, source-to-drain tunneling (SDT) has been recognized as the main cause leading to subthreshold swing ( SS ) saturation and degradation of short-channel MOSFETs at cryogenic temperatures. Generally, at a given low temperature, the steeper constant SS of thermionic currents may be overwhelmed by less-steep SDT currents at lower gate bias, degrading the average

This paper shows that vertical GaN-on-GaN p–i–n diodes are able to withstand long-term operation in moderate avalanche conduction regime, thus proving the excellent stability of the gallium nitride material system. Under constant stress in stronger avalanche regime, the devices show a significant increase in the series resistance, a slight increase in forward voltage and a measurable increase in avalanche

When the gated channel region of a GaN high-electron-mobility transistor (HEMT) is configured into multiple sub-channels in parallel and separated by embedded isolating patterns, the effective resistance of the access regions could be reduced, and consequently, the knee voltage ( ${V}_{{\text {K}}}$ ) of the transistor could be lowered. In this work, each sub-channel is defined as a convergent funnel-like

In this letter, we propose an area-efficient series-connected resonant tunneling diode pair device (SCRTD) to utilize as a binary neuron device in cellular neural networks (CNNs). The proposed SCRTD (P-SCRTD) consists of two RTDs interconnected by a floating metal layer with a high-doped epitaxial layer. The P-SCRTD shows a 48 % reduction in area by eliminating the isolation area in the conventional

This letter reports on the suppression of reverse leakage current ( ${I} _{r}$ ) in $\beta $ -Ga 2 O 3 Schottky barrier diodes (SBDs) through Schottky barrier modification by a low power CF 4 -plasma treatment prior to Schottky metal deposition. Revealed by an x-ray photoelectron spectroscopy (XPS) analysis, the fluorine-plasma treatment brought an incorporation of fluorine ions and depletion of silicon

In this letter, amorphous silicon nitride (Si 3 N 4 ) film grown by inductively coupled plasma chemical vapor deposition (ICPCVD) method is used as the photosensitive layer of deep ultraviolet (DUV) detection, whose thickness and roughness are 200 nm and 0.92 nm, respectively. The transverse symmetrical photoconductive detector with interdigital electrodes spacing of $4~\mu \text{m}$ is fabricated

GaInAs-based Metal Oxide Semiconductor High Electron Mobility Transistors (MOS-HEMTs) can in principle combine the wide bandwidth of HEMTs to the low gate leakage current of MOSFETs in a single deeply-scaled ultrahigh speed low-noise technology. Despite advances in the fabrication of MOS-HEMT devices and MMICs, the transistor microwave noise properties of GaInAs MOS-HEMT devices have not yet been reported

An option for the structural design of the metamorphic InGaAs photovoltaic converter is presented. The peculiarity of the proposed device is the ability to operate efficiently with the high-power 1064 nm laser radiation at the elevated up to +125°C temperatures. The temperature dependencies of the output photovoltaic parameters for two types of In x Ga 1−x As laser-power converters are presented in

This work studies the avalanche characteristics of the 1.2 kV vertical GaN p-n diodes with implanted edge termination, based on quasi-static current-voltage ( I-V ) sweeps and unclamped inductive switching (UIS) tests. The UIS tests reveal a ~1.7 kV avalanche breakdown voltage ( $BV_{{\text {AVA}}}{)}$ , 51 A maximum avalanche current ( ${I}_{{\text {AVA}}}{)}$ , and 63 mJ maximum avalanche energy

Temperature ( ${T}$ ) effects on MOSFET channel material benchmarking are explored using atomistic quantum and Monte Carlo simulation. Performance metrics such as OFF-current, maximum supply voltage ( ${V} _{\text {DD,max}}$ ), and effective inverter drive current ( ${I} _{{eff}}$ ) for novel channel materials (InGaAs and Ge nMOS) are compared with those of Si nMOS at 27 °C vs. 101 °C. For novel channel

In this letter we report a direct correlation between the space charge limited current flow and radiation detection properties of Cd x Zn 1-x Te 1-y Se y (CZTS) detector. CZTS is a recently discovered quaternary wide bandgap semiconductor for room-temperature gamma photon detection. The CZTS single crystals have been grown in-house using a modified Bridgman technique. Planar detectors were fabricated

Non-volatile field-effect transistor (FET) with amorphous Al 2 O 3 dielectric is demonstrated on Si substrate, which is enabled by the voltage modulation of the oxygen vacancy and negative charge dipoles in gate insulator. Ferroelectric-like behavior in TaN/Al 2 O 3 /Si 0.70 Ge 0.30 stacks with different thicknesses of Al 2 O 3 is proved by polarization-voltage tests, positive-up and negative-down

Resistive random-access memory (RRAM) devices that can execute logic are promising for in-memory computing. In state-of-the-art, a complementary resistive switch (CRS) bit-cell of two back-to-back bipolar RRAM shows a universal logic gate by multiple sequential write/compute operations using a resistance-based input/output (R-R logic) along with an extra read cycle . Here, we propose and experimentally

An optimization principle for ferroelectric FET (FeFET), centered around charge matching between the ferroelectric and its underlying semiconductor, is theoretically investigated. This letter shows that, by properly reducing the ferroelectric polarization charge and its background dielectric constant, charge matching can be improved to enable simultaneously: i) reduction of the interlayer and semiconductor

High voltage thin film transistor (HVTFT) built on glass can be used for distributed micro-inverters in the emerging applications, such as the building-integrated photovoltaics (BIPV) and smart glass. We report an HVTFT with a center-symmetric circular configuration which is built on a glass substrate at low temperature. The device is composed of a magnesium zinc oxide (MZO) based channel and a high-

Hysteresis is a frequently observed phenomenon in the transfer characteristics of thin film transistors. Charge trapping/de-trapping processes of gate oxide and gate-channel interface are commonly known to be the origin of hysteresis and correlated to low frequency noise (LFN) properties of the devices. In this letter, a rapid four-point sweeping method (RFSM) is proposed to reveal the dependence of

Freestanding thin-film transistors (TFTs) with multiple in-plane gates could meet increasing demands of mechanical flexibility and multifunctional integration. In this letter, freestanding flexible indium-zinc-oxide based TFTs with multi-gate structure and high electrical performance were reported. No obviously electrical degradation is observed under various mechanical stimuli due to the mechanical

The effects of NH 3 -plasma treating HfO 2 gate dielectric on electrical characteristics of top-gate (TG) MoS 2 FETs are investigated. The experimental results show that the increase of off-state current after growing HfO 2 top-gate dielectric can be considerably decreased by NH 3 -plasma treating HfO 2 , because the N incorporation from the NH 3 -plasma treatment can effectively eliminate the oxygen

This letter reports on a dual-mode wearable energy harvester that utilizes both piezoelectric and photoelectric effects. It integrates a piezoelectric transducer with a 3-D photosensitive dual-gate thin-film transistor (DGTFT) as a rectifier and a buffer. The energy conversion efficiency is enhanced by reducing the internal resistance of the 3-D photosensitive DGTFT upon light illumination. Such a

We report the enhancement in the electrical performance of solution-processed amorphous InZnO ( $a$ -IZO) thin-film transistors (TFTs) through incorporation of low-temperature photosensitive polysilsesquioxane (P-PSQ) passivation. P-PSQ passivated TFTs recorded smaller ${V}_{th}$ shift of 1.5 V after positive bias stress test despite annealing at 180°C. Analysis of secondary ion mass spectrometry and

In this letter, the effects of negative and positive bias stability with respect to the anion composition of Zn–O–N thin-film transistors were researched. In the positive bias stress tests, the threshold voltage shift was high for ZnON devices with high nitrogen composition. In contrast to this, the negative bias stress test results have smaller $\Delta ~\text{V}_{th}$ values when nitrogen composition

The green InGaN/GaN micro light-emitting diode (Micro-LED) is a significant component in micro-display whereas lack of size dependence and high injected current analysis. In this letter, different size Micro-LEDs were fabricated and the electro-optical characteristics were measured. The size-dependence phenomenon for EQE “efficiency droop”, luminous flux and brightness were observed and discussed.

In conventional quantum dot light-emitting diodes (QLEDs), the organic charge transport materials are susceptible to erosion by water and oxygen, which would reduce the efficiency and lifetime of the devices. Herein, we modified the surface of the organic hole transport layer with an ultra-thin Al 2 O 3 layer, which is deposited by using atomic layer deposition technique, to obtain the highly efficient

This paper presents a new charge coupled device (CCD) based on capacitive deep trench isolation (CDTI), developed in CMOS technology. The 2 phase device features collection, storage and transfer in the silicon volume. Full Well Charge (FWC) of about 2.6ke-/ $\mu \text{m}^{2}$ and Charge Transfer Inefficiency (CTI) below $1\times 10^{-4}$ have been measured via electrical charge injection on pixels

A novel self-modulated superjunction lateral double-diffused MOSFET (SM-SJ LDMOS) is proposed and experimentally realized in this letter. When a SJ is introduced into a lightly doped N-drift region, the 3-D depletion regions appear surrounding the P-pillars. This 3-D junction field effect transistor (JFET) effect decreases the current paths in both N-pillars and N-drift, causing a largely increased

In this work, we discuss the mitigation of threshold voltage ( ${V}_{{TH}}$ ) variability in nanoscale FinFET by exploiting the interaction of oxygen vacancies (OV) against metal gate granularity (MGG). Deposition of a metal gate on high- $\kappa $ dielectric HfO 2 is known to generate OV in the dielectric which induces variability in surface potential. A higher workfunction of metal grain increases

Tunneling magnetoresistive (TMR) magnetic sensors are broadly applied in various fields. However, to further improve the limit of detection (LOD), it is highly desirable to realize and calculate the noise limits of such sensor systems. Thus, techniques for noise elimination can be developed. In this paper, we propose an equivalent magnetic noise model to describe the LOD of a TMR magnetometer by considering

The development of two-dimensional materials with gas-sensitive properties has been a research focus in the field of materials science. Considering the excellent properties of graphene and hexagonal boron nitride, a monolayer composite is put forward and its potential for gas sensing has been investigated by density functional theory. Compared to common gases in the atmosphere and three other toxic

The sensing performance of antimonene towards SF 6 decomposition gases was investigated by first principles calculations in this paper. By analyzing the adsorption energy, charge transfer, work function variation, and density of states (DOS), we concluded that antimonene is sensitive and selective to the SF 6 decomposition gas product SO 2 . Unlike previous studies, the effect of Stone-Wales (SW) defects

A method of increasing the selectivity of highly-oversized open cavities is experimentally demonstrated in the electron cyclotron maser (gyrotron) operating at the second cyclotron harmonic in a high transverse mode (presumably, TE 58,13 ) of a circular cylindrical cavity at a frequency near 1.2 THz in the magnetic field of 24 T. This method is purely electrodynamical and based on a simple deformation

In this letter, a novel, electrostatic discharge tolerant, semiconductor-based electro-explosive device was presented. The device which was called integrated semiconductor bridge (ISCB) chip consists of a monocrystalline silicon heating element, which was utilized to ignite pyrotechnic mix in weapon. Two planar transient suppression diode arrays were incorporated into the chip to protect against electrostatic

This letter investigates the impact of read operation on the electrical properties of hafnium oxide-based ferroelectric field-effect transistors (FeFETs). We report that a quasi-static read may induce a series of phenomena, including a severe underestimation of the memory window, undesirable loss of the stored state, i.e. destructive read, increased variability and an apparent steep-slope behavior

The dynamically active synaptic elements are the fundamental building blocks in neuromorphic systems towards artificial intelligence with computing and sensing capabilities. Here, a two-dimensional (2D) MoS 2 synaptic transistor is fabricated by using poly(ethylene oxide) (PEO) and lithium perchlorate (LiClO 4 ) as a laterally coupled ion-conducting electrolyte. Due to the strong electric double layer

Fabrication of gate-recessed SrSnO 3 (SSO) metal-semiconductor field-effect transistors (MESFETs) with Ni Schottky gates is reported on bi-layer epitaxial SSO films with a thin heavily-doped cap layer. Devices with 0.5- $\mu \text{m}$ gate length showed enhancement-mode behavior with a saturation drain current, ${I}_{\text {DSAT}}$ , of 33 mA/mm and peak transconductance, ${g}_{\text {m,max}}$ , of

III-V vertical nanowire MOSFETs (VNW-FETs) have the potential to extend Moore’s law owing to their excellent material properties. To integrate highly scaled memory cells coupled with high performance selectors at minimal memory cell area, it is attractive to integrate low-power resistive random access memory (RRAM) cells directly on to III-V VNW-FETs. In this work, we report the experimental demonstration

In analog crosspoint array-based architectures for neural network computation, short failure of a crosspoint synaptic device can cause a serious issue, preventing normal operation of the devices sharing the row and column as well as the peripheral circuits. In this paper, we characterize a $32\times 32$ array of PCMO (Pr x Ca 1-x MnO 3 )-based resistive random-access memory (RRAM) devices, and obtained

An artificial nociceptor realized with a single 2D MoS 2 -based memristor device is demonstrated in this work. The threshold switching memristor (TSM) device exhibits volatile resistance switching characteristics with low threshold voltage and a high ON-OFF ratio of 10 6 . The Au/MoS 2 /Ag TSM device imitates a nociceptor, a special receptor of a sensory neuron that can detect noxious stimulus and

Lamb wave delay lines with acoustoelectri-cally-induced non-reciprocity are demonstrated in suspended lithium niobate-on-silicon waveguides for the first time. An electric current is fed through the silicon layer in the same axis as the piezoelectrically-transduced acoustic waves which are attenuated or amplified depending on the direction of the energy exchange with drifting electrons (i.e. acoustoelectric

In The above article [1] , the Acknowledgment was deleted in error. Therefore, the Acknowledgment is added below. This change had no influence on the discussion and conclusions in the article.

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It is my great pleasure to announce the winner of the 2019 Electron Devices Society George E. Smith Award given to a letter published in the IEEE Electron Device Letters (EDL) in 2019. The selection was made by vote of EDL’s Editors. The letter is titled “Large-Area 1.2-kV GaN Vertical Power FinFETs With a Record Switching Figure of Merit” and it is authored * by Yuhao Zhang, Min Sun, Josh Perozek

Prof. William S. Wong, having served as an Editor for IEEE Electron Device Letters since 2011, has completed his tenure. On behalf of IEEE Electron Device Letters authors, staff and readers, I would like to thank him for his excellent contributions and dedicated service to the journal over the past nine years.

For the first time, a single transistor neuron (1T-neuron) with an independently accessed double-gate structure is demonstrated for excitatory-inhibitory function, and control of the firing threshold voltage ( ${V}_{{\text {T,firing}}}$ ). The double-gate is composed of a primary gate and a secondary gate. The former is to determine an excitatory and inhibitory state as a toggle switch and the latter

Vertical III-V nanowire MOSFETs have demonstrated excellent performance including high transconductance and high ${I}_{\text {on}}$ . One main bottleneck for the vertical MOSFETs is the large access resistance arising from the contacts and ungated regions. We demonstrate a process to reduce the access resistance by combining a gate-last process with ALD gate-metal deposition. The devices demonstrate

A gallium arsenide (GaAs)-based millimeter-wave broadband bandpass filter (BPF) is proposed based on slotted half-mode substrate integrated waveguide (HMSIW) spoof surface plasmon polaritons (SSPPs). The center frequency and bandwidth of this SSPP-based on-chip BPF can be easily controlled by tuning the geometry dimensions of the SSPP unit cell, which is attributed to its unique dispersion characteristics

Among the III-V semiconductor materials, indium arsenide (InAs) nanowire (NWs) with high carrier mobility are expected to be alternative channels for high-performance and low-power field-effect transistors (FETs). However, there is a challenge in enhancing the on-state current for the InAs NW-channel vertical gate-all-around (VGAA) structures on Si. We investigated vertical InAs/InP core-shell (CS)