In this paper a dual E–shaped patch (ESP) antenna is proposed to enhance the wider impedance bandwidth to be use for wireless communications in 5G applications. The proposed dual ESP antenna performance analysis is carried out with stub in this work. The proposed ESP antenna with stub achieving reflection coefficient below -10 dB for obtained multiple resonant bands. The dual ESP antenna operates at

This paper presents a fast configurable automatic gain control (AGC) with strong focus on fast acting control and low power consumption. This AGC includes two paths, main amplification path and gain adjusting path. Using the gain adjusting path through an extra amplifier provides a way for tracking and comparing the input signal with four adjusted thresholds to be judged for selecting the appropriate

This paper studies how nonlinear distortion is generated in the combination of an inverter-based low-noise amplifier and a passive mixer. The dominant nonlinearity appears to be the quadratic \(V_{gs}V_{ds}\) mixing term in the passive mixer that first causes low-frequency IM2 and then upconverts it to IM3. Adding a common-mode feedback (CMFB) cancels the IM2 in a pseudo-differential structure, and

A Flower Shaped Frequency Coded Chip-less RFID Tag with a fully printable and polarization-independent tag is discussed in this paper. The tag encodes a data capacity of 12 bits. The data is encoded and transmitted using the RF encoding particle technique in the spectral domain as a frequency signature of the resonators. The proposed 12-bit tag covers the spectral range from 8 to 11.5 GHz. The tag

This research article reports electronically tunable high-frequency meminductor based on single output operational transconductance amplifiers (OTA) and differential voltage current conveyor (DVCC). The reported design has two OTAs, one DVCC, two capacitors and a resistor. Here we have presented both theoretical as well as the simulation aspects of the meminductor design using Cadence Virtuoso at 0

In this communication, a current feedback operational amplifier (CFOA) based novel architecture of voltage-mode analog multiplier/divider circuit has been proposed. The proposed circuit employs a single CFOA and four MOSFETs. The multiplier circuit can operate in four quadrant modes, whereas, the divider circuit can operate in two quadrant modes. The applications of the proposed multiplier circuit

This paper presents carbon nanotube field effect transistor (CNTFET) implementation of voltage differencing current conveyor (VDCC). We propose new topology of multi input–single output (MISO) CNTFET VDCC universal filter using only 2 resistors and 2 capacitors. The CNTFET VDCC filter circuit can be tuned electronically only by changing transconductance value, and there is no need for component matching

The paper presents an SRAM macro capable of working down to 350 mV with programmable wordline boosting feature. Wordline boosting allows us to improve the performance while keep the supply voltage in sub-threshold region. The measurement results on a 16 kb macro achieves minimum energy consumption of 0.536 fJ/b at 400 mV and operating at 400 mV. In addition, the macro achieves 22% lower energy consumption

An energy-efficient switching scheme for low voltage SAR ADCs is presented in this paper. The method achieves dramatic switching energy reduction without the generation of the third reference level and reset energy by using the improved semi-resting DAC structure and floating-capacitor technique, which also contributes to great simplification of control logic. Additionally, the LSB-down technique combined

Continuous wavelet transform (CWT) has been proven to be an effective tool in feature extraction of non-stationary bio-signals. Therefore, hardware implementation of CWT has been widely investigated in wearable sensor integrated with local intelligence algorithm. To realize the feature extraction from low-frequency bio-signals, the design method of low-frequency Gm-C wavelet filter used in wearable

An electrode resistance monitoring circuit utilizing current comparison is proposed and demonstrated for implantable cardiac pacemakers. The resistance detection circuit compares the electrode resistance with the reference resistance in a highly-symmetrical topology based on current reference. It works in deep sub-threshold region with ultra-low power consumption. However, it is able to achieve a resistance

This paper presents a theory for the power transfer efficiency of printed circuit board coils to integrated circuit coils, with focus on load-dependence for low-power single-chip systems. The theory is verified with electromagnetic simulations modelled on a 350 nm CMOS process which in turn are verified by measurements on manufactured integrated circuits. The power transfer efficiency is evaluated

3D-HEVC is the state-of-the-art standard to compress three-dimensional videos. One of the 3D-HEVC novel tools is the DIS tool, which is used to efficiently compress smooth and homogeneous areas of depth maps by using four different prediction modes. The decision of which DIS mode will be used is done through the SVDC similarity criterion in the DIS original definition. This article proposes the substitution

In this work, we address a low-cost test of switched capacitors filters embedded in configurable analog sections. The proposal improves the Transient Analysis Method (TRAM) by incorporating a similarity measure, dynamic time warping. In this way, we extend TRAM to cases that that initially were not compatible and simplify the test of filters of order higher than two. This paper performs the test evaluation

In this paper, a new current-mode instrumentation amplifier is presented using a single current differencing current controlled current conveyor building block and one grounded resistor. The proposed instrumentation amplifier (IA) can easily be cascaded due to the possession of low impedance current input, and high impedance current output. It offers a high differential gain (73.35 dB) and high bandwidth

The inverter-based shunt-feedback transimpedance amplifier (TIA) has become an essential building block for high-speed receivers for optical interconnects in advanced technologies due to its low operating voltage and high efficiency. Previously, the design of TIA’s optimal noise is based on the relationship between the photodetector’s capacitance, \(C_{{\mathrm {D}}}\), and the TIA’s capacitance, \(C_{{\mathrm

Due to wireless communication’s rapid growth, the need for low power integrated transceivers is increasing. The receiver power is a major limiting factor, and the radio frequency (RF) front-end is often its significant power consuming part. Therefore, system-level design in which the overall specifications are distributed among RF front-end building blocks such that the minimum total power is consumed

In this paper a four mode 130 nm RF CMOS power amplifier (PA) in a single propagation path topology is presented and evaluated with IEEE 802.11ax signals. Specifically, this configuration is supported by three main concepts: scaling of the supply voltage, consecutive voltage amplifications and selection of the operation modes of transistors (saturation or triode). The concept is tested at 2.4 GHz and

In this paper new continuous-time sigma delta modulator that supports complex band-pass (CBP) architectures with the re-configurable bandwidths of 5 and 10 MHz is presented. In this design a new CBP sigma delta ADC with less number of Gm cells and low power consumption has mentioned. A complex gm-c topology with positive feedback compensation, current reuse, feed forward techniques are used to reduce

This paper presents a proposed ultra-low-power second order feedforward (FF) delta sigma (ΔΣ) modulator using two different integrators structures for implantable biomedical devices in the MICS band. In fact, the first active integrator is designed using a proposed optimized bulk driven telescopic operational transconductance amplifier while the second passive one is designed using a MOS Parametric

In this paper, a wide band inductorless differential low noise amplifier (LNA) is designed and analyzed. To attain ultra-low power consumption, several gm-enhancement techniques have been used. gm-enhancement achieved by active negative feedback and cross coupling techniques. By several gm-enhancement, in spite of the low intrinsic transconductance of the MOS transistor, low noise, high gain, and good

In filter based reactive power measurements, the voltage is phase shifted by \(90^\circ\) relative to the current. This paper presents a technique of measuring reactive power based on differential \(90^\circ\) shifter. According to this method, the sampled voltage and the current signal passes through a pair of FIR filters that shifts \(+\,45^\circ\) and \(-\,45^\circ\). Then, the two outputs are multiplied

This paper investigates wireless power transmission (WPT) system efficiency of antenna arrays in free space and in fully enclosed boxes with reflecting walls. In this study we investigate the WPT approach for both a uniform transmitting antenna array and a random array. Specifically, we consider 10 transmitting antennas (Tx) placed on two opposite walls of a cubical room and one receiving antenna (Rx)

A phase frequency detector (PFD) with a very low dead zone is proposed which is based on a configuration adaptable to both CMOS or carbon nano-tube transistors (CNTFETs). In the first step the proposed configuration is designed using CMOS transistors, and then CNTFETs are substituted to improve the speed and reduce the propagation delay. The proposed PFD in addition to very low dead zone, has low power

The blood flow in human arterial system can be considered as a fluid dynamics problem. Simulation of blood flow will provide a better understanding of the physiology of human body. Simulation studies of blood flow in the diseased condition can help to diagnose the health problem easily and also have many applications in the areas such as surgical planning and design of medical devices. This paper presents

Reconfigurable hardware accelerators (RAs) attached to processors have become a frequent choice to meet the performance demand of current embedded applications. However, answering when the combination of general purpose processors (GPPs) and RAs can provide the expected performance at the additional area and energy cost demands an extensive design space exploration (DSE). Performing DSE through hardware

This paper presents a voltage differencing current conveyor (VDCC) based voltage-mode (VM) proportional integral derivative (PID) controller for the first time. The proposed VM PID controller consists of a single VDCC, four resistors, and two grounded capacitors. The proposed circuit employs a minimum number of passive components and does not require any passive element matching condition. The proposed

Approximate computing stands out in systems in which the simplicity must be above the demand for high precision and processing speed. It is the case of DNA systems, especially those based on the DNA strand displacement technique, which is naturally in a complex and noise-filled environment. In this sense, proposals for approximate DNA circuits implemented with an analog approach promise future disease

This paper presents a new approach to the design of inverse filters using the second-generation voltage conveyor (VCII). The designs of low pass, high pass and band pass inverse filters are presented. The filter’s parameters can be controlled according to the required specifications. Simulation results obtained using Tanner Tspice in 0.18 µm TSMC CMOS technology confirm the functionality of the proposed

This paper presents the design of a highly integrated eight port broadband slot antenna. The proposed slot antenna has a smaller footprint (33 × 33 × 0.8 mm3) and is constructed using one-quarter of an annular slot ring antenna. The miniaturized antenna has a broadband impedance characteristics covering 3 GHz–9 GHz making the antenna suitable for broadcasting applications within the realized 6 GHz

The early and accurate diagnosis of cardiovascular diseases (CVDs) are of great importance as they allow early and proper medical treatment and therefore result in reducing the chance of the CVDs being developed to an acute level. In medical procedures, the first step in examining the cardiovascular function is the auscultation of the heart. However, the correct medical diagnosis based on the heart

Nowadays, there has been an intensive increase in embedded systems complexity. So that optimization and performance development become an interesting topic to study. In this proposal, the main problem to solve is to make the possibility to get more flexibility, to reduce cost and to improve performance. Considering this fact, we introduce in this paper a reconfigurable component integrated into Cortex

In this paper, a bulk driven quadrature filter is proposed for low power applications. A 3rd complex filter is designed by cascade connection of 2nd order right shifted Low Pass Filter with first order right shifted notch filter, which helps in improving the selectivity of the filter. The quadrature filter is implemented by employing Fully Differential Current Conveyor (FDCCII) as a basic building

The next generation of non-volatile memory elements have been attracting significant attention for future emerging memory applications in recent years. Several technologies have been developed to occupy a new field in storage-class memory and even replace NAND flash memories in sequential logic applications, due to their advantageous features such as fast programming time, low power consumption, high

In this paper, a block based systematic approach for synchronous design of linear filters and oscillators through full design space exploration is presented, which exploits inherent hierarchical property of tree. To bridge the gap between system specification and hardware structure of analog system, transfer function of linear filter and characteristic equation of oscillator have been modeled using

In this paper, a voltage mode all-pass filter design employing floating current sources (FCS) is proposed. The presented all-pass filter circuit contains two floating current sources, one grounded resistor and one floating capacitor. Furthermore, the PMOS transistors of the FCSs are replaced with dynamic threshold-voltage MOSFET (DTMOS) transistors. Due to the use of DTMOS transistors, power consumption

A reconfigurable and hardware proficient hybrid VLSI architecture is greatly necessitated for spectrum sensing that is a combination of energy detection and time domain cyclostationary techniques for cognitive radio applications. One among the key features of Cognitive Radio is Spectrum Sensing which is exploited for allocating unused frequency band efficiently. Various research works are being carried

We present the design and analysis of G-band CMOS Wilkinson power dividers and dual balun for G-band communication and imaging systems. Miniature spiral and U-shaped four-way Wilkinson power dividers, which are based on three two-way Wilkinson power dividers, are designed and implemented. Miniature spiral dual balun, which is equivalent to an upper balun and a lower balun in parallel, is also designed

In this paper, a new fundamental cell in positive feedback source coupled logic is presented, which is an improvement over the existing fundamental cell employed in digital circuit design in various high resolution mixed-signal integrated circuits. The operation of the existing fundamental cell relies on using large sized transistor in its centre branch, resulting in significantly larger implementation

Remarkable progress in the field of wireless communication has created a research interest for Viterbi decoder with long duration of battery life, low power dissipation and portabilty in the application. Such a low power Viterbi decoder is required in the area of high speed data transfer application like communication in the convolutional coding for error free inforamtion. This article propose two

The purpose of this research is to design and implement embedded instrumentation and processing for sEMG signal. This embedded system is based on PSoC reconfigurable technology. The methodological approach followed consists of two aspects. A theoretical aspect aims to identify sEMG signal proprieties and characterize the key performances of electromyography instrumentation. And a practical aspect demonstrates

In the last two decades, filters based on defected ground structure (DGS) have been employed in various radio frequency systems, and there has been a significant growth in using these structures. In non-tunable filters, a separate unit is used for each telecommunication channel, while the use of tunable filters can reduce the size of multichannel filters. In this paper, tunable filters based on DGS

Fault diagnosis of analog circuit is critical to improve safety and reliability in electrical systems and reduce losses. Traditional fault diagnosis methods of analog circuit usually rely on the hand design feature extractor and can not generalize well to other diagnosis domains. To address these issues, an end-to-end denoising autoencoder (EEDAE)-based fault diagnosis approach is proposed. The proposed

Full adder circuit is a ubiquitous building block in VLSI systems and application specific integrated circuits. This article presents an area and power delay product (PDP) efficient CMOS based 1 bit full adder which is suitable to perform arithmetic operations. The simulation results obtained for parameter analysis using Cadence tool shows that the proposed adder preserves more than 20.7% power over

This paper presents a new structure for high-resolution, low-power and wideband discrete time multi-stage (DT-MASH) sigma-delta (ΣΔ) modulators. It uses multi-bit digital input feed forward path (DFF) and noise coupling (NC) techniques. With the DFF technique, the modulator does not need a power-consuming analog adder at the quantizer input, and the number of comparators of the quantizer will be reduced

A vertical RF-MEMS (Radio Frequency Micro ElectroMechanical Switch) switch design is proposed in this work that features a shunt capacitive configuration and can operate at a very low actuation voltage. Besides operating on a low switching voltage, the switch behold a small value of insertion loss in Up (ON) state and offers a towering isolation factor in Down (OFF) state. A horizontal structure of

This paper introduces a novel autonomous chaotic jerk circuit with an antiparallel diodes pair whose mathematical model involves an inverse hyperbolic sine function in the form: \(f\left( x \right) = k - 2x + 4\arcsin h\left( {mx} \right)\) where \(k\) (i.e. a constant excitation source) controls the symmetry of the model while \(m\) represents the slope of the inverse hyperbolic sine. The presence

This paper presents a CMOS low power Variable Gain Low Noise Amplifier for 26–34 GHz in 45 nm process technology, which composes of cascaded complimentary common gate (CCG) stage and digital current steering amplifier. First stage is CCG stage, which helps in achieving the low power consumption and less area. Second stage is variable gain amplifier, uses current reuse technique as well as gm-boost

This work presents a power-efficient and noise-efficient amplifier for ECG recordings. To improve power efficiency, all the transistors in the proposed amplifier is designed in sub-threshold region which gives high g\(_m\)/I\(_D\) ratio. To improve noise efficiency, inverter-based differential input stage is used in this proposed operational transconductance amplifier as it reduces noise by a factor

A contactless scribe-line channel-leakage monitor with relaxed alignment requirement is described. It comprises photovoltaic converters for powering from indoor illumination, a visible light communication downlink for selecting one among multiple monitors, and an ultra-wideband impulse-radio uplink for transmitting the measured leakage data in the form of impulse repetition frequency. Readout is accomplished

This paper presents several proposed scenarios for medical image transmission over Wireless Multimedia Sensor Networks with multi-level security tools and Unequal Error Protection (UEP) technique to provide highly secure and improved medical images transmitted over the wireless link. The proposed scenario is based on embedding the medical images with audio watermarking technique. The audio signal is

In this paper, a microstrip filter using a modified stepped impedance resonator with high return loss, low insertion loss, and ultra-wide stopband is presented. The frequency response of the filter based on the layout and LC model is presented. The presented LPF consists of stepped impedance resonators to achieve a − 20 dB suppression level from 3.26 GHz up to 30 GHz. Using stepped impedance resonators

It has been a challenging task for the designers to implement on-chip bandpass filter at high frequency with better performance. In this paper, a tunable RF bandpass filter using double resistive feedback floating active inductor (AI) based on gyrator-C topology has been proposed using 40 nm CMOS technology for 5 GHz WLAN applications. Small signal analytical modelling determines the design parameters

In this work, we present a new RF receiver architecture capable of addressing different RF bands and communication protocols. The frequency planning and discrete-time complex signal processing choices greatly simplify the frequency synthesis circuit. Since this is one of the most power-hungry blocks in the receiver, one can expect a reduction in power consumption. Thanks to the Bandpass Sampling (BPS)

This short paper proposes a circuit configuration to emulate the hard-switching behaviour of a grounded flux-controlled incremental/decremental memristor, based on current follower with externally controllable terminal intrinsic resistor. The circuits use a single grounded capacitor which benefits from the integrated circuit (the MOS-capacitance can be used instead of the capacitor when the simulator

In this paper, CPW-Fed ultra wideband (UWB) planar monopole antenna loaded by double inclined elliptical split ring resonators (ESRRs) for double band-notch characteristics is introduced, examined, and fabricated. Two different ESRRs with different dimensions are printed in the antenna backside to notch two different frequencies in the UWB frequency range instead of using two ESRR pairs as usual. The

Soft fault diagnosis has been validated as a very challenging problem in analog circuits. In order to improve the generalization ability and close to the practical application of fault diagnosis models, a novel method for obtaining a large number of training samples in soft fault interval is proposed in the present work. Training samples are randomly generated in the interval of soft fault to adapt

SRAMs are extensively used in system-on-chip designs. Embedded SRAMs occupy majority of the die area leading to increased power consumption. Although the performance of SRAM in finer technologies has remarkably improved, still cell stability and leakage power dissipation are major concerns at deep sub-micron regime. In this paper, a low leakage SRAM cell is proposed based on source-biased inverter

Airborne capacitive micromachined ultrasonic transducers (CMUTs) have predominantly large input capacitive reactance with small series radiation resistance. To maximize the acoustic power radiation at resonance we employ low cost LC matching networks between the low output impedance driving source and CMUT transducer. Conventional LC networks, including pi and T-network topologies are employed to provide

This paper proposes a voltage mode analog circuit structure for max and min pooling methods used in convolutional neural network (CNN) in order to reduce the size of the image. The circuit architecture is based on WTA and LTA circuits with 4-input and 9-input since 2 × 2 and 3 × 3 max/min pooling operations are carried out. WTA and LTA circuits have a quite simple structure and consist of operational