Presents the table of contents for this issue of the publication.

Presents a listing of the editorial board, board of governors, current staff, committee members, and/or society editors for this issue of the publication.

We compare measured and simulated RF third-order distortion current, as well as the corresponding IP3, as a function of bias, for a SiGe heterojunction bipolar transistor (HBT), using MEXTRAM. The collector–base (CB) depletion capacitance model is identified to limit IP3 modeling accuracy near its peak. New CB capacitance modeling options are developed to significantly improve high-current IP3 modeling

We presented and demonstrated a new type of vertical nanowire (NW) and nanosheet (NS) field-effect transistors (FETs), named vertical sandwich gate-all-around FETs or VSAFETs, which were formed with the process compatible in the main stream industry. The VSAFETs with self-aligned high- ${k}$ metal gates (HKMGs) were fabricated with epitaxy of Si/SiGe/Si sandwich structure, an isotropic quasi-atomic-layer-etch

In this article, the impact of random fluctuation sources, such as metal gate granularity (MGG), line edge roughness (LER), and random dopant fluctuations (RDFs), are numerically studied for U-shaped n-channel fully depleted silicon on insulator (FDSOI) MOSFET (U-SOIFET) over conventional n-channel FDSOI MOSFET (C-SOIFET) for 7-nm technology node. This article reports that improved short-channel effect

In this article, the power gating (PG) technique is analyzed using nano-electro-mechanical switches (NEMS), FinFETs, and nanowire field-effect transistors (NWFETs). We have used detailed circuit level simulations using well-calibrated models to obtain the conditions for net energy saving with thermal effects. We demonstrate that for a benchmark 17-stage buffer chain circuit, the NEMS PG will be superior

We report the fabrication and characterization of atomic layer deposition (ALD)-titanium oxide (TiO 2 )/ silicon oxynitride (SiON)/n-Si gate-stack with ultrathin SiON (~4.46 nm) as an interfacial layer (IL) grown prior on the Si substrate followed by postdeposition annealing (PDA) of ALD-TiO 2 in O 2 ambient and N 2 ambient. The structural characterization comprises the atomic force microscopy (AFM)

Recent advances in CMOS scaling have made circuits more and more sensitive to errors and dysfunction caused by ionizing radiation, even at ground level, requiring accurate modeling of such effects. Besides generation, transport, and collection of radiation-induced excess carriers, another phenomenon, called funneling, has to be modeled for an accurate prediction of soft errors. The funneling effect

The influence of hot-carrier degradation (HCD) on lateral trap distribution within the device channel is experimentally investigated for gate-all-around nanowire (NW) nFETs. In particular, using drain-induced barrier lowering (DIBL) as the parameter, the damage caused by hot-carriers (HCs) is monitored for devices with different geometries, including fin width and gate length. It is observed that with

In this study, p-type Pi-gate (PG) poly-Si nanowire channel junctionless accumulation-mode (JAM) field-effect transistors (FETs) were successfully fabricated and their reliability was investigated. The reliability of these PG JAM FETs was found to be dependent on the effective channel doping concentration ( ${N}_{\text {ch,eff}}$ ). Through a negative gate bias stress (NGBS) test, we found that degradation

In this article, we report the temperature-dependent transistor characteristic of Epi-Gd 2 O 3 /AlGaN/GaN metal oxide semiconductor high electron mobility transistor (MOSHEMT) and compare its properties with that of AlGaN/GaN metal-Schottky high electron mobility transistor (HEMT) grown on 150 mm Si (111) substrate. Introducing an epitaxial single crystalline Gd 2 O 3 between the metal gate and AlGaN

In this article, we have systematically investigated the effect of annealing of fabricated GaN Schottky barrier diodes (SBDs) and anode metals with various work-functions on the performance of AlGaN/GaN SBDs. It is found that after annealing of fabricated GaN SBDs, the interface states between the metal and GaN etching surface are suppressed, the device stability is enhanced, and the turn-on voltage

Heavy ion-induced electrical degradations and mechanisms of high-electron-mobility transistors (HEMTs) were investigated in this article. AlGaN/GaN HEMTs were irradiated by 800-MeV Bi ions with total fluence of $5.23\times 10^{{10}}$ ions/cm 2 . The results show that the saturation current decreased by 13.1%, the threshold voltage negatively shifted by 0.21 V, the peak transconductance decreased by

This article demonstrates the integrated comparators, hysteresis comparators, and sawtooth generators based on aluminum–gallium–nitride/gallium–nitride (AlGaN/GaN) metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs). The integrated circuits (ICs) exhibit thermal stability from 25 °C to 250 °C in both static and transient performances. The threshold voltage ( ${V}{_{\text {th}}}$

We successfully developed 25-nm quad CoFeB/MgO-interfaces perpendicular magnetic tunnel junction (quad-MTJ) with enough thermal stability. To fabricate the quad-MTJ, a physical vapor deposition (PVD) process for depositing novel free layer and low resistance-area ( RA ) product MgO layer and low-damage fabrication processes were developed. The developed quad-MTJ technology and advanced process bring

A physics-based compact model of reliability degradation in analog resistive random access memory (RRAM) is developed. The model captures the stochastic degradation behaviors of retention, bit yield, and endurance during analog resistive switching. The model is verified with statistical data measured from analog RRAM arrays. Based on this compact model, a device-to-system simulation framework for the

Achieving a reliable multilevel programming operation in resistive random access memory (RRAM) arrays is still a challenging task. In this work, we assessed the impact of the voltage step value used by the programming algorithm on the device-to-device (DTD) variability of the current distributions of four conductive levels and on the energy consumption featured by programming 4-kbit HfO 2 -based RRAM

We present a nonvolatile resistive-gate metal–oxide–semiconductor-field-effect transistor (RG-MOSFET). An RG-MOSFET comprises a MOSFET and dielectric layers sandwiched between the top and bottom electrode metal–dielectric–metal (MDM). The gate of the MOSFET is electrically connected to the bottom electrode of MDM in series. Dielectric layers of MDM are composed of a resistance-switching layer made

In this article, an L-shaped tunnel field-effect transistor (LTFET)-based one-transistor dynamic random access memory (1T DRAM) with SiGe storage region was demonstrated through 2-D TCAD simulations. The SiGe storage is utilized to boost not only the sense margin (SM) but also the retention time (RT) in comparison to the previously published TFET-based 1T DRAMs. The simulation results reveal that the

Resistive random-access memory (RRAM) with atomic layer deposited (ALD) nitrogen-doped aluminum oxide (AlO x N y ) resistive dielectric appropriate for high-density 3-D vertical via array is demonstrated. With appropriate ALD electrodes, the RRAM exhibits almost forming-free, sub-microamperes programming currents, and appropriate resistance ranges. As the via size is scaled down, the set voltage and

This article presents an analytical method for parameter extraction in oxide semiconductor field-effect transistors (OS FETs), including threshold voltage ( ${V}_{\text {T}}$ ), effective channel length ( ${L}_{\text {eff}}$ ), source–drain series resistance ( ${R}_{\text {SD}}$ ), and intrinsic effective mobility ( $\mu _{\text {int}}$ ). An analytical expression of effective mobility ( $\mu _{\text

The hydrogen behavior in the amorphous In–Ga–Zn–O (a-IGZO) thin-film layer according to the device process with top gate structure was quantitatively investigated. The hydrogen quantities in the a-IGZO thin-film layer with gate insulator (w/GI) and after GI dry-etching were increased by $3.40\times 10^{20}$ and $2.50\times 10^{\vphantom {D^{a}}20}$ /cm 3 , respectively, in comparison with without GI

This study investigates how ambient/carrier gases affect the material characteristics of amorphous indium–gallium–zinc oxide (a-InGaZnO) thin films deposited using the ultrasonic spray pyrolysis deposition (USPD) method. Nitrogen and air are used as the ambient/carrier gases in this study. The crystallinity, oxygen deficiency, energy bandgap, and trap level in the a-InGaZnO thin films are analyzed

Indium–gallium–zinc-oxide (IGZO) thin-film transistors (TFTs) gated with sputtered silicon dioxide dielectric were fabricated. Under different sputtering pressures of silicon dioxide, the device is able to produce transfer curves from clockwise hysteresis to anticlockwise hysteresis, corresponding to different operation modes and thus adding complementary performance by the same material system and

The degradation mechanism of amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) under pulse drain bias stress is investigated. Although the degradation mechanism is found to be a dc one, the shift of the transfer curve under the pulse drain bias (0–20 V) is unexpectedly larger than that under dc drain bias (20 V) within the same equivalent stress time. The degradation mechanism is proposed to

Back-contact modification using a 10-nm ZnS layer in CZTSSe-based solar cell can play a crucial role in improving photovoltaic conversion efficiency. An ultrathin layer of ZnS is deposited over Mo-coated soda lime glass substrate before depositing CZTSSe using sputtering. The crystal structure of deposited CZTSSe thin films over ZnS is recognized as (112)-oriented, polycrystalline in nature, and free

Three-diode lumped-parameter equivalent circuit model conforms to photovoltaic device physics and processes an exact analysis for ${I}$ – ${V}$ characteristics of industrial solar cells, because it explains the different leakage current components especially for recombination current resulting from defects or grain boundaries. However, three-diode model’s complete circuit topology leads to complicated

We report high-performance homojunction GaN avalanche photodiodes (APDs) grown on a low-defect GaN substrate and fabricated with an ion-implantation isolation method. High-quality p-i-n GaN layers were grown using metalorganic chemical vapor deposition (MOCVD), and an effective device isolation method using optimized nitrogen ion implantation was developed to provide significant leakage current suppression

In this article, in addition to two commonly known noise parameters—dark count rate (DCR) and afterpulsing (AP)—we explore another interesting phenomenon–random telegraph signal (RTS) noise—during the transitional phase of the avalanching process. We present the properties of the RTS noise and their dependence on the biasing voltage and temperature. An analytical model is used to extract the dimension

The full well capacity (FWC) and the pinned photodiode (PPD) capacitance of four-transistor pixel in a CMOS image sensor are reported to be dependent on the potential barrier offered by transfer gate (TG). The asymmetrical TG channel potential increases the effective potential barrier, thereby increasing the FWC and decreasing the feedforward charges. At the PPD-TG interface, a potential pocket can

The correlated color temperature (CCT) variation of the phosphor-converted light-emitting diodes (LEDs) after curing is a common phenomenon. In the past, it was believed that the phenomenon was caused by the sedimentation of phosphor particles. However, not only sedimentation, but these particles can also flow with the natural convection of silicone because of nonuniform heating during curing. The

This article presents a simple yet powerful general pinning process model for 3-D pinned photodiodes (PPDs), which can be used to model PPDs with small dimensions (miniature PPDs). For the development of a pinning model, capable of dealing with different PPD shapes and dimensions, the charge population in the space charge region (SCR) is calculated. Moreover, to improve the model’s accuracy, the PPD

This article reported about the ultraviolet (UV) radiation effect on the resonance frequency response of a AT-cut piezoelectric quartz crystal. A large resonance frequency upshift was observed when the quartz crystal was irradiated by UV light of 355-nm wavelength using a Q-switched pulsed Nd:YVO4 UV laser. The dynamic frequency response behavior was systematically investigated by illuminating the

In this work, we demonstrate the potential of a gallium nitride (GaN)-based visible-blind ultraviolet (UV) photodetector (PD) on a commercially viable 150-mm Si wafer. The influence of thermionic field emission (TFE) and Poole–Frenkel (PF) mechanisms on the current transport of the PD has been analyzed. Conduction due to the TFE mechanism dominates in the moderate electric fields (1.25 kV/cm ${ < }{E}

We fabricate Ge:B-blocked impurity band (BIB) far-infrared detectors using near-surface processing techniques. The current–voltage ( ${I}$ – ${V}$ ) characteristics and the energy band structure are investigated. It is found that there are three interfacial barriers in Ge:B BIB detectors due to the bandgap narrowing effect. The barrier height can be adjusted by changing the doping concentration in

Pure boron (PureB) deposition as the anode region of Si photodiodes creates negative fixed charge at the boron/silicon interface, which is responsible for effective suppression of electron injection from the bulk, thus ensuring low saturation/dark current densities. This mechanism is shown here to remain effective when PureB diodes, fabricated at 700 °C, are operated at cryogenic temperatures down

This research studies the performance of n-side up thin-film AlGaInP-based vertical micro-light-emitting diodes (V- $\mu $ LEDs) with four different chip sizes, $100\times100$ , $70\times70$ , $50\times50$ , and $25\times 25\,\,\mu \text{m}^{2}$ , on a $50~\mu \text{m}$ thick composite metal (copper/Invar/copper; CIC) substrate. The LEDs were fabricated to understand the electrical and optical properties

We have shown that it is possible to create effective light-emitting devices with interband recombination based on current injection unipolar heterostructures. In the proposed concept, effective interband radiative recombination at current pumping is achieved by (1) the use of a quantum well (QW) located in the narrow bandgap carrier accumulation region of the unipolar heterostructure and (2) the presence

Greater than 190 °C continuous wave (CW) lasing is achieved from 905 nm high-efficiency vertical cavity surface-emitting lasers (VCSELs). The maximum power conversion efficiency (PCE) of 46.3% for ${4}~\mu \text{m}$ VCSELs was demonstrated under the ambient temperature of 30 °C. The maximum PCE decreases only 10% of its value from 30 °C to 90 °C, showing stable high-temperature characteristics. The

Knowing exactly potentials’ distribution in pixels is a key to ensure that electronretention and transport enable a good pixel operation. Moreover, it is also a key parameter for controlof charge storage capabilityor fullwell capacity, strongly driven by potential barriers. In this article, a new method is presented to characterize potentialswithin pixels from test structure measurements. The proposed

In this work, TCAD-based investigation of junctionLess (JL) architecture having double gate (DG) has been performed for visualizing the sensitivity of the device against light intensity. Comparison has been drawn between conventional DG MOSFET and DG-JL transistor (DG-JLT) under dark and light conditions. Effect of light intensity and wavelength has been modulated to optimize the device sensitivity

An electrostatic discharge (ESD)-protected one-time-programmable (OTP) memory front-end circuit, for high-voltage (HV) applications, designed and manufactured in silicon-on-insulator (SOI) technology, is presented. The SOI technology meets HV functional-isolation and level-shifting requirements but is not suitable for advanced analog circuits. The presented OTP memory is discussed as an introduction

The article presents a new design of an AlGaAs/GaAs low-voltage thyristor for efficient high-current pulse generation at high repetition rates. It is demonstrated that optimizing the low-voltage thyristor p-base doping profile by using a thin highly doped layer allows for a significant increase in the operating frequencies. This applies to both a thyristor working without an external load and a vertical

Total-ionizing-dose (TID) radiation response on unclosed edge termination is investigated for high voltage silicon-on-insulator (SOI) laterally diffused metal–oxide–semiconductor (LDMOS) in this article. Radiation-induced dual-channel leakage current model is proposed to reveal the mechanism of leakage current generation at OFF-state. Radiation causes a mass of positive oxide trapped charges generated

High-performance AlGaN/GaN lateral Schottky barrier diodes (SBDs) with recess structure and dual metal nitride anodes were demonstrated. With high work-function and nonrecess structure, a NiN anode enhances the breakdown voltage (BV), while a TiN anode reduces the turn-on voltage ( ${V}_{ \mathrm{\scriptscriptstyle ON}}$ ) due to its low work-function and contact to the two-dimensional electron gas

A novel 700 V triple REduced SURface Field (RESURF) lateral double-diffused MOSFETs (LDMOS) with a variable high- ${K}$ (VHK) dielectric trench for smart power applications is proposed and studied by TCAD simulations. Compared with conventional triple RESURF (CTR) LDMOS, the new structure features a composite high- ${K}$ (HK) dielectric trench embedded in the drain edge. First, a higher HK dielectric

In this work, a method was investigated to extract trench sidewall and trench bottom capacitances of a SiC trench metal–oxide–semiconductor (MOS) structure. Five groups of 4H-SiC trench MOS capacitors were designed and fabricated, with various trench bottom widths and trench mesa widths. High-frequency capacitance–voltage (HFCV) measurements at 100 kHz were performed on these trench MOS structures

Dopant segregation (DS) technique has been extensively employed to tune Schottky barrier heights (SBHs) of NiSi/Si diodes, either leading to reduced specific contact resistivity ( $\rho _{\text {c}}$ ) in source/drain (S/D) Ohmic contacts, or enhanced current drivability in Schottky barrier S/D MOSFET (SB-MOSFET) where metallic NiSi is employed as S/D. A capacitance–voltage ( ${C}$ – ${V}$ ) method

Thermal management in a heat source-based electronic package is a necessity for reliable, long-lasting performance, as it is compulsory to dissipate the generated heat effectively. In this study, a novel nickel–phosphorous (Ni–P) alloy coating on an aluminum substrate is proposed to obtain improved thermal properties such as thermal conductivity ( ${k}$ ), total thermal resistance ( ${R}_{{\mathrm

The effect of atomic-layer-deposition (ALD)-derived Al 2 O 3 passivation layer on the interface quality of Er 2 O 3 /Al 2 O 3 /InP laminated stacks and the improvement of electrical performance has been investigated systematically. The chemical bonding states measured by high-resolution X-ray photoelectron spectroscopy (XPS) reveal that the ALD-derived Al 2 O 3 passivation layer can effectively inhibit

This article reports the influence of both contact condition and island edge on the electrical characteristics of the pseudo-metal-oxide-semiconductor-field-effect-transistor (pseudo-MOSFET) method. Our measurements reveal the sensitivity of the classical pseudo-MOSFET method on contact condition. We clarify that the presence of the OFF-state (an electrical characteristic) is controlled by modulating

The capacitance is a characteristic function of an electrical energy storage device that relates the applied voltage on the device to the accumulated electric charge. It is inconsistently taken in some studies as a multiplicative function in the time domain [i.e., ${q}_{t}{(}{t}{)}={c}_{t}{(}{t}{)} \times {v}_{t}{(}{t}{)}$ ], and in others as a multiplicative function in the frequency domain [i.e.

In the last decade, we witness an active search for an efficient, reliable and long-lasting power source for miniature devices and wireless sensors. One of the promising energy conversion methods for the development of such a power source is the direct-charge energy-harvesting method. This technique is implemented in a vacuum capacitor arrangement. In this setting, the kinetic energy of the emitted

Metaconductors with near-zero permeability is an incentive for the development of high-frequency passive components due to effective suppression of skin effect. In this work, an asymmetric multilayered structure is proposed to broaden the bandwidth of skin effect suppression while preserving a sufficient lower frequency limit of permeability compensation. Coplanar waveguide (CPW) transmission lines

In this work, a novel 3-D equivalent circuit model of thermoelectric microelectro-mechanical system (MEMS) microwave power sensor is proposed. According to the model, the 3-D temperature distribution and the response time of the thermoelectric MEMS microwave power sensor are obtained. The thermoelectric MEMS microwave power sensor is designed and fabricated based on GaAs monolithic microwave integrated

We report the first experimental proof of concept of a new electromechanical adiabatic logic family operating without any kind of electrical and mechanical contacts. Based on comb-drive actuators and standard microelectromechanical system (MEMS) microfabrication, we demonstrate the cascadability of logic gates up to 170 °C, and operation in the kilohertz-range under a power supply of 4.5 V. Assuming

In this article, for the first time, we present the improvement in efficiency in a low-voltage dc–dc boost converter for the energy-harvesting applications using the experimentally demonstrated sub-50-mV nano electro-mechanical switch (NEMS). As per the measurement results, the sub-50-mV NEMS having a small air gap of only 100 nm exhibits very low hysteresis (< 20 mV), low turn-on delay (15 ns), and

Exponential growth of industrialization has triggered the need of a cheap and reusable water quality monitoring system to maintain drinkable water standards. This present work demonstrates n-type hierarchical flower-like nanostructured TiO 2 on p-Si/SiO 2 substrate to fabricate compact photon-assisted resistive sensor for Cd(II) ions detection in wastewater. The sensor presented a maximum response

Silicon is widely used as the device material for many micro resonators applied in timing and frequency referencing. One key disadvantage of silicon resonators compared to quartz resonators is their high thermal sensitivities. Doping silicon is a promising approach for temperature stability. Doped resonators operating at large deformation and finite strain amplitude often go to nonlinear regimes; therefore

We analyzed the low-frequency noise (LFN) of dual-gated field-effect transistor (DG-FET) biosensors with Schottky contacts. We found the flicker noise at the sensing insulator–semiconductor interface to be the major noise source while employing Schottky contacts to have minimal noise contribution with a sufficiently large back-gate bias voltage. The measured noise dependence on transconductance further