The maglev train has been successful in practice as a new type of ground transportation. Owing to the inherent nonlinearity and open-loop instability of the electromagnetic suspension (EMS) system, an analogue or a digital controller is used to control the maglev trains’ stability. With the rapid development of embedded systems and artificial intelligence, intelligent digital control has begun to replace

In this paper we present, simulate, and evaluate Dynamic Asynchronous Neighbor Discovery protocol for Directional Antennas (DANDi), a neighbor discovery protocol for Wireless Sensor Networks (WSN) with directional antennas that guarantees that every reliable communication link in a network is discovered. DANDi is asynchronous, fully directional (supports both directional transmissions and receptions)

In the era of intelligence, the processing of a large amount of information and various intelligent applications need to rely on embedded devices. This trend has made machine learning algorithms play an increasingly important role. High-performance embedded computing is an effective means to solve the lack of computing power of embedded devices. Aiming at the problem that the calculation amount of

Modern embedded systems must have high reliability and performance. They should be able to tolerate both hard as well as soft errors occurring in the resources constituting the system. Reliability must be part of the system design and the system must consist of non expensive off-the-shelf resources. A system-level design process of reliable system demands efficient reliability evaluation of the explored

Rising data rates and input/output density in integrated circuits are challenging the traditional off-chip copper interconnect solutions, demanding a compatible high-speed serial interface capable of maintaining multi-gigabits data rates. Designers typically choose copper interconnect for chip-to-chip connections in a Multi-FPGA System (MFS). However, copper based interconnects are incapable of scaling

Real-time safety-critical systems are getting more complicated due to the introduction of mixed-criticality systems. The increasing use of mixed-criticality systems has motivated the real-time systems research community to investigate various non-functional aspects of these systems. Energy consumption minimization is one such aspect which is just beginning to be explored. In this paper, we propose

Developing embedded systems that are distributed is a challenging endeavour, since they need to ensure system-wide properties as well as existence of a large number of possible candidate system architectures. Various model based techniques advocate raising the abstraction level in order to support a holistic view of such a distributed embedded system. Furthermore, automatically generating implementation

A system to automatically recognize vehicle license plates is a growing need to improve safety and traffic control, specifically in major urban centers. However, the license plate recognition task is generally computationally intensive, where the entire input image frame is scanned, the found plates are segmented, and character recognition is then performed for each segmented character. This paper

Given the saturation of single-threaded performance improvements in General-Purpose Processor, novel architectural techniques are required to meet emerging demands. In this paper, we propose a generic acceleration framework for approximate algorithms that replaces function execution by table look-up accesses in dedicated memories. A strategy based on the K-Means Clustering algorithm is used to learn

The demands of system complexity and design productivity for embedded systems can be managed by simplifying and reusing the design. Furthermore, these systems should be verified as early as possible in the development process to reduce the cost and effort. The rationale of the proposed framework in this article is to simplify the design and verification process of embedded systems in the context of

In order to define executable hardware description language while at the same time be fit for formal proofs of properties, a hardware description language VeriFormal, embedded in Isabelle/HOL, was created. VeriFormal, together with a translator and Isabelle/HOL proof facility, provides a platform for designing, simulating and reasoning about hardware designs. Building such an environment is challenging

The increasing demand of Industrial and Scientific data intensive applications are higher precision arithmetic with reduced computation time. In this paper, we designed a high-precision, fully pipelined 32-bit floating-point (FP) divider using Newton–Raphson (NR) algorithm realized with Urdhva–Tiryakbhyam (UT) multiplier for System on Chip applications. The divider design is based on Newton–Raphson

Real-time embedded systems need software and hardware to be time-predictable to guarantee the correct behavior of the system. Precision Timed Machines are architectures designed for timing predictability and repeatability. They help to improve design time and the efficiency of real-time embedded systems by allowing to separately verify the timing properties of modules. This paper presents a Simultaneous

This work presents Memphis, which comprises a flexible EDA framework and a many-core model for heterogeneous SoCs. The framework, together with the many-core model supports the integration of processors, network interfaces, routers, and peripherals. A set of tools enable a decoupled generation and compilation of the hardware, operating systems, and applications. The hardware model is cycle-accurate

As a mainstream computing and storage strategy for mobile communications, Internet of Things and large data applications, mobile edge computing strategy mainly benefits from the deployment and allocation of small base stations. Mobile edge computing mainly helps users to complete complex, intensive and sensitive computing tasks. However, the algorithm has many problems in practical application, such

Efficient scheduling of tasks in cyber-physical systems or internet-of-things is a challenging prospect primarily due to their demands to meet critical performance goals in the face of stringent resource constraints. In addition, to enhance ease of implementation and more efficient usage of resources, these schedulers are many-a-times restricted to be non-preemptive, where jobs once started must be

In electronic design automation, hardware/software co-design significantly reduces the time-to-market and improves the performance of embedded systems. With the increasing scale of applications and complexity of hardware architecture of embedded systems, hardware/software co-design is still a research hotspot. As hardware/software co-design is a wide topic, this paper focuses on major developments

Industrial environments are typically characterised by high levels of interference. Therefore, standards for industrial wireless sensor networks (WirelessHART, ISA 100.11a, and IEEE 802.15.4e) have defined a time division and multichannel-based mode of operation, in which pairs of time slots and channels are assigned to links representing communication between nodes. In IEEE 802.15.4e this mode of