
显示样式: 排序: IF: - GO 导出
-
Optimization of Signal Processing Applications Using Parameterized Error Models for Approximate Adders ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2021-01-11 Celia Dharmaraj; Vinita Vasudevan; Nitin Chandrachoodan
Approximate circuit design has gained significance in recent years targeting error-tolerant applications. In the literature, there have been several attempts at optimizing the number of approximate bits of each approximate adder in a system for a given accuracy constraint. For computational efficiency, the error models used in these routines are simple expressions obtained using regression or by assuming
-
Facilitating Human Activity Data Annotation via Context-Aware Change Detection on Smartwatches ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2021-01-11 Ali Akbari; Jonathan Martinez; Roozbeh Jafari
Annotating activities of daily living (ADL) is vital for developing machine learning models for activity recognition. In addition, it is critical for self-reporting purposes such as in assisted living where the users are asked to log their ADLs. However, data annotation becomes extremely challenging in real-world data collection scenarios, where the users have to provide annotations and labels on their
-
Analytical Program Power Characterization for Battery Depletion-time Estimation ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2021-01-04 Mahdi Mohammadpour Fard; Mahmood Hasanloo; Mehdi Kargahi
Appropriate battery selection is a major design decision regarding the fast growth of battery-operated devices like space rovers, wireless sensor network nodes, rescue robots, and so on. Many such systems are mission critical, where estimation of the battery depletion time has an important role in the design efficiency with regard to the mission time. Accurate characterization of the system power usage
-
ForSyDe-Atom: Taming Complexity in Cyber Physical System Design with Layers ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2021-01-04 George Ungureanu; José Edil Guimarães De Medeiros; Timmy sundström; Ingemar Söderquist; Anders Åhlander; Ingo Sander
We present ForSyDe-Atom, a formal framework intended as an entry point for disciplined design of complex cyber-physical systems. This framework provides a set of rules for combining several domain-specific languages as structured, enclosing layers to orthogonalize the many aspects of system behavior, yet study their interaction in tandem. We define four layers: one for capturing timed interactions
-
Heuristic Computation Offloading Algorithms for Mobile Users in Fog Computing ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2021-01-04 Keqin Li
The investigation in this article makes the following important contributions to combinatorial optimization of computation offloading in fog computing. First, we rigorously define the two problems of optimal computation offloading with energy constraint and optimal computation offloading with time constraint. We do this in such a way that between execution time and energy consumption, we can fix one
-
Reducing Energy in GPGPUs through Approximate Trivial Bypassing ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2021-01-04 Ehsan Atoofian; Zayan Shaikh; Ali Jannesari
General-purpose computing using graphics processing units (GPGPUs) is an attractive option for acceleration of applications with massively data-parallel tasks. While performance of modern GPGPUs is increasing rapidly, the power consumption of these devices is becoming a major concern. In particular, execution units and register file are among the top three most power-hungry components in GPGPUs. In
-
Probabilistic Estimation of Threat Intrusion in Embedded Systems for Runtime Detection ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2021-01-04 Nadir A. Carreon; Sixing Lu; Roman Lysecky
With billions of networked connected embedded systems, the security historically provided by the isolation of embedded systems is no longer sufficient. Millions of new malware are created every month and zero-day attacks are becoming an increasing concern. Therefore, proactive security measures are no longer enough to provide protection to embedded systems. Instead, reactive approaches that detect
-
Minimization of WCRT with Recovery Assurance from Hardware Trojans for Tasks on FPGA-based Cloud ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-12-07 Debasri Saha; Susmita Sur-Kolay
Dynamic partial reconfiguration (DPR) enabled FPGA-based Cloud architecture acts as a flexible and efficient shared environment to facilitates application support to users’ request at low cost. While on one hand we need to handle a variety of tasks, such as periodic or sporadic, deadline or non-deadline, high or low critical tasks from the point of producing correct results, on the other hand we are
-
A TCAM-based Caching Architecture Framework for Packet Classification ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-12-07 Vegesna S. M. Srinivasavarma; Shiv Vidhyut; Noor Mahammad S
Packet Classification is the enabling function for performing many networking applications like Integrated Services, Differentiated Services, Access Control/Firewalls, and Intrusion Detection. To cope with high-speed links and ever-increasing bandwidth requirements, time-efficient solutions are needed for which Ternary Content Addressable Memories (TCAMs) are popularly used. However, high cost, heavy
-
Generalized Weakly Hard Schedulability Analysis for Real-Time Periodic Tasks ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-12-07 Paolo Pazzaglia; Youcheng Sun; Marco Di Natale
The weakly hard real-time model is an abstraction for applications, including control systems, that can tolerate occasional deadline misses, but can also be compromised if a sufficiently high number of late terminations occur in a given time window. The weakly hard model allows us to constrain the maximum number of acceptable missed deadlines in any set of consecutive task executions. A big challenge
-
Adaptive Task Allocation and Scheduling on NoC-based Multicore Platforms with Multitasking Processors ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-12-07 Suraj Paul; Navonil Chatterjee; Prasun Ghosal; Jean-Philippe Diguet
The application workloads in modern multicore platforms are becoming increasingly dynamic. It becomes challenging when multiple applications need to be executed in parallel in such systems. Mapping and scheduling of these applications are critical for system performance and energy consumption, especially in Network-on-Chip– (NoC) based multicore systems. These systems with multitasking processors offer
-
Improving the Performance of Hybrid Caches Using Partitioned Victim Caching ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-12-07 Sukarn Agarwal; Hemangee K. Kapoor
Non-Volatile Memory technologies are coming as a viable option on account of the high density and low-leakage power over the conventional SRAM counterpart. However, the increased write latency reduces their chances as a substitute for SRAM. To attenuate this problem, a hybrid STT-RAM-SRAM architecture is proposed where with large STT-RAM ways, the small SRAM ways are incorporated for handling the write
-
Golden Chip-Free Trojan Detection Leveraging Trojan Trigger’s Side-Channel Fingerprinting ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-12-07 Jiaji He; Haocheng Ma; Yanjiang Liu; Yiqiang Zhao
Hardware Trojans (HTs) have become a major threat for the integrated circuit industry and supply chain and have motivated numerous developments of HT detection schemes. Although the side-channel HT detection approach is among the most promising solutions, most of the previous methods require a trusted golden chip reference. Furthermore, detection accuracy is often influenced by environmental noise
-
Verifying the Safety of Autonomous Systems with Neural Network Controllers ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-12-07 Radoslav Ivanov; Taylor J. Carpenter; James Weimer; Rajeev Alur; George J. Pappas; Insup Lee
This article addresses the problem of verifying the safety of autonomous systems with neural network (NN) controllers. We focus on NNs with sigmoid/tanh activations and use the fact that the sigmoid/tanh is the solution to a quadratic differential equation. This allows us to convert the NN into an equivalent hybrid system and cast the problem as a hybrid system verification problem, which can be solved
-
MAGNETO: Fingerprinting USB Flash Drives via Unintentional Magnetic Emissions ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-12-07 Omar Adel Ibrahim; Savio Sciancalepore; Gabriele Oligeri; Roberto Di Pietro
Universal Serial Bus (USB) Flash Drives are nowadays one of the most convenient and diffused means to transfer files, especially when no Internet connection is available. However, USB flash drives are also one of the most common attack vectors used to gain unauthorized access to host devices. For instance, it is possible to replace a USB drive so that when the USB key is connected, it would install
-
RVSDG: An Intermediate Representation for Optimizing Compilers ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-12-01 Nico Reissmann; Jan Christian Meyer; Helge Bahmann; Magnus Själander
Intermediate Representations (IRs) are central to optimizing compilers as the way the program is represented may enhance or limit analyses and transformations. Suitable IRs focus on exposing the most relevant information and establish invariants that different compiler passes can rely on. While control-flow centric IRs appear to be a natural fit for imperative programming languages, analyses required
-
PANDORA: An Architecture-Independent Parallelizing Approximation-Discovery Framework ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-11-11 Greg Stitt; David Campbell
In this article, we introduce a parallelizing approximation-discovery framework, PANDORA, for automatically discovering application- and architecture-specialized approximations of provided code. PANDORA complements existing compilers and runtime optimizers by generating approximations with a range of Pareto-optimal tradeoffs between performance and error, which enables adaptation to different inputs
-
Formal Verification of Spacecraft Control Programs ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-10-15 Georgy Lukyanov; Andrey Mokhov; Jakob Lechner
Verification of correctness of control programs is an essential task in the development of space electronics; it is difficult and typically outweighs design and programming tasks in terms of development hours. This article presents a verification approach designed to help spacecraft engineers reduce the effort required for formal verification of low-level control programs executed on custom hardware
-
DIAC: An Inter-app Conflicts Detector for Open IoT Systems ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-10-02 Xinyi Li; Lei Zhang; Xipeng Shen
This article tackles the problem of detecting and solving potential conflicts among independently developed apps that are to be installed into an open Internet-of-Things (IoT) environment. It provides a new set of definitions and categorizations of the conflicts to more precisely characterize the nature of the problem, and it proposes a representation named “IA Graphs” for formally representing IoT
-
Exploring Impact of Profile Data on Code Quality in the HotSpot JVM ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-10-02 April W. Wade; Prasad A. Kulkarni; Michael R. Jantz
Managed language virtual machines (VM) rely on dynamic or just-in-time (JIT) compilation to generate optimized native code at run-time to deliver high execution performance. Many VMs and JIT compilers collect profile data at run-time to enable profile-guided optimizations (PGO) that customize the generated native code to different program inputs. PGOs are generally considered integral for VMs to produce
-
A Retargetable MATLAB-to-C Compiler Exploiting Custom Instructions and Data Parallelism ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-10-02 Ioannis Latifis; Karthick Parashar; Grigoris Dimitroulakos; Hans Cappelle; Christakis Lezos; Konstantinos Masselos; Francky Catthoor
This article presents a MATLAB-to-C compiler that exploits custom instructions present in state-of-the-art processor architectures and supports semi-automatic vectorization. A parameterized processor model is used to describe the target instruction set architecture to achieve user-friendly retargetability. Custom instructions are represented via specialized intrinsic functions in the generated code
-
A Vector-Length Agnostic Compiler for the Connex-S Accelerator with Scratchpad Memory ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-10-02 Alexandru E. Şuşu
Compiling sequential C programs for Connex-S, a competitive, scalable and customizable, wide vector accelerator for intensive embedded applications with 32 to 4,096 16-bit integer lanes and a limited capacity local scratchpad memory, is challenging. Our compiler toolchain uses the LLVM framework and targets OPINCAA, a JIT vector assembler and coordination C++ library for Connex-S accelerating computations
-
Introduction to the Special Issue on Languages, Compilers, Tools, and Theory of Embedded Systems: Part 2 ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-09-29 Aviral Shrivastava; Jian-Jia Chen; Youtao Zhang
No abstract available.
-
Creating Hardware Component Knowledge Bases with Training Data Generation and Multi-task Learning ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-09-29 Luke Hsiao; Sen Wu; Nicholas Chiang; Christopher Ré; Philip Levis
Hardware component databases are vital resources in designing embedded systems. Since creating these databases requires hundreds of thousands of hours of manual data entry, they are proprietary, limited in the data they provide, and have random data entry errors. We present a machine learning based approach for creating hardware component databases directly from datasheets. Extracting data directly
-
EncoDeep: Realizing Bit-flexible Encoding for Deep Neural Networks ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-09-29 Mohammad Samragh; Mojan Javaheripi; Farinaz Koushanfar
This article proposes EncoDeep, an end-to-end framework that facilitates encoding, bitwidth customization, fine-tuning, and implementation of neural networks on FPGA platforms. EncoDeep incorporates nonlinear encoding to the computation flow of neural networks to save memory. The encoded features demand significantly lower storage compared to the raw full-precision activation values; therefore, the
-
Optimizing Tensor Contractions for Embedded Devices with Racetrack and DRAM Memories ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-09-29 Asif Ali Khan; Norman A. Rink; Fazal Hameed; Jeronimo Castrillon
Tensor contraction is a fundamental operation in many algorithms with a plethora of applications ranging from quantum chemistry over fluid dynamics and image processing to machine learning. The performance of tensor computations critically depends on the efficient utilization of on-chip/off-chip memories. In the context of low-power embedded devices, efficient management of the memory space becomes
-
Fast and Energy-Efficient State Checkpointing for Intermittent Computing ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-09-29 Saad Ahmed; Naveed Anwar Bhatti; Muhammad Hamad Alizai; Junaid Haroon Siddiqui; Luca Mottola
Intermittently powered embedded devices ensure forward progress of programs through state checkpointing in non-volatile memory. Checkpointing is, however, expensive in energy and adds to the execution times. To minimize this overhead, we present DICE, a system that renders differential checkpointing profitable on these devices. DICE is unique because it is a software-only technique and efficient because
-
Demystifying Energy Consumption Dynamics in Transiently powered Computers ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-09-29 Saad Ahmed; Muhammad Nawaz; Abu Bakar; Naveed Anwar Bhatti; Muhammad Hamad Alizai; Junaid Haroon Siddiqui; Luca Mottola
Transiently powered computers (TPCs) form the foundation of the battery-less Internet of Things, using energy harvesting and small capacitors to power their operation. This kind of power supply is characterized by extreme variations in supply voltage, as capacitors charge when harvesting energy and discharge when computing. We experimentally find that these variations cause marked fluctuations in clock
-
Development Automation of Real-Time Java: Model-Driven Transformation and Synthesis ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-09-26 Wanli Chang; Ran Wei; Shuai Zhao; Andy Wellings; Jim Woodcock; Alan Burns
Many applications in emerging scenarios, such as autonomous vehicles, intelligent robots, and industrial automation, are safety-critical with strict timing requirements. However, the development of real-time systems is error prone and highly dependent on sophisticated domain expertise, making it a costly process. This article utilises the principles of model-driven engineering (MDE) and proposes two
-
SPECTRUM: A Software-defined Predictable Many-core Architecture for LTE/5G Baseband Processing ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-09-26 Vanchinathan Venkataramani; Aditi Kulkarni; Tulika Mitra; Li-Shiuan Peh
Wireless communication standards such as Long-term Evolution (LTE) are rapidly changing to support the high data-rate of wireless devices. The physical layer baseband processing has strict real-time deadlines, especially in the next-generation applications enabled by the 5G standard. Existing basestation transceivers utilize customized DSP cores or fixed-function hardware accelerators for physical
-
Dealing with Uncertainty in pWCET Estimations ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-09-26 Federico Reghenzani; Luca Santinelli; William Fornaciari
The problem of estimating a tight and safe Worst-Case Execution Time (WCET), needed for certification in safety-critical environment, is a challenging problem for modern embedded systems. A possible solution proposed in past years is to exploit statistical tools to obtain a probability distribution of the WCET. These probabilistic real-time analyses for WCET are, however, subject to errors, even when
-
GMAI: Understanding and Exploiting the Internals of GPU Resource Allocation in Critical Systems ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-09-26 Alejandro J. Calderón; Leonidas Kosmidis; Carlos F. Nicolás; Francisco J. Cazorla; Peio Onaindia
Critical real-time systems require strict resource provisioning in terms of memory and timing. The constant need for higher performance in these systems has led industry to recently include GPUs. However, GPU software ecosystems are by their nature closed source, forcing system engineers to consider them as black boxes, complicating resource provisioning. In this work, we reverse engineer the internal
-
Crab-tree: A Crash Recoverable B+-tree Variant for Persistent Memory with ARMv8 Architecture ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-09-26 Chundong Wang; Sudipta Chattopadhyay; Gunavaran Brihadiswarn
In recent years, the next-generation non-volatile memory (NVM) technologies have emerged with DRAM-like byte addressability and disk-like durability. Computer architects have proposed to use them to build persistent memory that blurs the conventional boundary between volatile memory and non-volatile storage. However, ARM processors, ones that are widely used in embedded computing systems, start providing
-
TrustFlow-X: A Practical Framework for Fine-grained Control-flow Integrity in Critical Systems ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-09-26 Cyril Bresch; David Hély; Roman Lysecky; Stéphanie Chollet; Ioannis Parissis
This article addresses the challenges of memory safety in life-critical medical devices. Since the last decade, healthcare manufacturers have embraced the Internet of Things, pushing technological innovations to increase market share. Medical devices, including the most critical ones, tend to be increasingly connected to the Internet. Unfortunately, as critical devices often rely on unsafe programming
-
Hardware Performance Counter-Based Fine-Grained Malware Detection ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-09-26 Sai Praveen Kadiyala; Pranav Jadhav; Siew-Kei Lam; Thambipillai Srikanthan
Detection of malicious programs using hardware-based features has gained prominence recently. The tamper-resistant hardware metrics prove to be a better security feature than the high-level software metrics, which can be easily obfuscated. Hardware Performance Counters (HPC), which are inbuilt in most of the recent processors, are often the choice of researchers amongst hardware metrics. However, a
-
Approximate Cache in GPGPUs ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-09-26 Ehsan Atoofian
There is a growing number of application domains ranging from multimedia to machine learning where a certain level of inexactness can be tolerated. For these applications, approximate computing is an effective technique that trades off some loss in output data integrity for energy and/or performance gains. In this article, we present the approximate cache, which approximates similar values and saves
-
Network-level Design Space Exploration of Resource-constrained Networks-of-Systems ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-06-19 Zhuoran Zhao; Kamyar Mirzazad Barijough; Andreas Gerstlauer
Driven by recent advances in networking and computing technologies, distributed application scenarios are increasingly deployed on resource-constrained processing platforms. This includes networked embedded and cyber-physical systems as well as edge computing in mobile applications and the Internet of Things (IoT). In such resource-constrained Networks-of-Systems (NoS), computation and communication
-
LAMBDA: Lightweight Assessment of Malware for emBeddeD Architectures ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-06-19 Sai Praveen Kadiyala; Manaar Alam; Yash Shrivastava; Sikhar Patranabis; Muhamed Fauzi Bin Abbas; Arnab Kumar Biswas; Debdeep Mukhopadhyay; Thambipillai Srikanthan
Security is a critical aspect in many of the latest embedded and IoT systems. Malware is one of the severe threats of security for such devices. There have been enormous efforts in malware detection and analysis; however, occurrences of newer varieties of malicious codes prove that it is an extremely difficult problem given the nature of these surreptitious codes. In this article, instead of addressing
-
Application of Logical Sub-networking in Congestion-aware Deadlock-free SDmesh Routing ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-06-19 Tuhin Subhra Das; Prasun Ghosal; Navonil Chatterjee; Arnab Nath; Akash Banerjee; Subhojyoti Khastagir
An adaptive routing helps in evading early network saturation by steering data packets through the less congested area at the oppressive loaded situation. However, performances of adaptive routing are not always promising under all circumstances. Say for, given more freedom in choosing an alternate route on non-minimal paths for a substantially loaded network even may result in worsening network performances
-
DSTL: A Demand-Based Shingled Translation Layer for Enabling Adaptive Address Mapping on SMR Drives ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-07-04 Yi-Jing Chuang; Shuo-Han Chen; Yuan-Hao Chang; Yu-Pei Liang; Hsin-Wen Wei; Wei-Kuan Shih
Shingled magnetic recording (SMR) is regarded as a promising technology for resolving the areal density limitation of conventional magnetic recording hard disk drives. Among different types of SMR drives, drive-managed SMR (DM-SMR) requires no changes on the host software and is widely used in today’s consumer market. DM-SMR employs a shingled translation layer (STL) to hide its inherent sequential-write
-
Firmness Analysis of Real-time Tasks ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-07-12 Amir Behrouzian; Hadi Alizadeh Ara; Marc Geilen; Dip Goswami; Twan Basten
(m,k)-firm real-time tasks require meeting the deadline of at least m jobs out of any k consecutive jobs. When compared to hard real-time tasks, (m,k)$-firm tasks open up the possibility of tighter resource-dimensioning in implementations. Firmness analysis verifies the satisfaction of (m,k)-firmness conditions. Scheduling policies under which a set of periodic tasks runs on a resource influence the
-
Applying Multiple Level Cell to Non-volatile FPGAs ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-07-12 Ke Liu; Mengying Zhao; Lei Ju; Zhiping Jia; Jingtong Hu; Chun Jason Xue
Static random access memory– (SRAM) based field programmable gate arrays (FPGAs) are currently facing challenges of limited capacity and high leakage power. To solve this problem, non-volatile memory (NVM) is proposed as the alternative to build non-volatile FPGAs (NVFPGAs). Even though the feasibility of NVFPGA has been confirmed, the utilization of multiple level cells (MLCs) has not been fully exploited
-
Energy-efficient Real-time Scheduling on Multicores: A Novel Approach to Model Cache Contention ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-07-04 Saad Zia Sheikh; Muhammad Adeel Pasha
With the increasing demand for higher performance, the adoption of multicores has been a major stepping stone in the evolution of hard real-time systems. Though the computational bandwidth is increased due to parallel processing, the indispensable interactivity between the hierarchical memory sub-system and multiple cores has further aggravated the already complex worst case execution time (WCET) analysis
-
Game-Based Task Offloading of Multiple Mobile Devices with QoS in Mobile Edge Computing Systems of Limited Computation Capacity ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-07-04 Junyan Hu; Kenli Li; Chubo Liu; Keqin Li
Mobile edge computing (MEC) is becoming a promising paradigm of providing computing servers, like cloud computing, to Edge node. Compared to cloud servers, MECs are deployed closer to mobile devices (MDs) and can provide high quality-of-service (QoS; including high bandwidth, low latency, etc) for MDs with computation-intensive and delay-sensitive tasks. Faced with many MDs with high QoS requirements
-
DyVEDeep ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-06-11 Sanjay Ganapathy; Swagath Venkataramani; Giridhur Sriraman; Balaraman Ravindran; Anand Raghunathan
Deep Neural Networks (DNNs) have advanced the state-of-the-art in a variety of machine learning tasks and are deployed in increasing numbers of products and services. However, the computational requirements of training and evaluating large-scale DNNs are growing at a much faster pace than the capabilities of the underlying hardware platforms that they are executed upon. To address this challenge, one
-
Adapting Recursive Sinusoidal Software Oscillators for Low-power Fixed-point Processors ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-05-16 Hugues Smeets; Matteo Ceriotti; Pedro José Marrón
The growing field of the Internet of Things relies at the bottom on components with very scarce computing resources that currently do not allow complex processing of sensed data. Any computation involving Fast Fourier Transforms (FFT), Wavelet Transforms (WT), or simple sines and cosines is considered impractical on low-end devices due to the lack of floating point and math libraries. This article
-
DEEPEYE ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-05-16 Yuan Cheng; Guangya Li; Ngai Wong; Hai-Bao Chen; Hao Yu
Video object detection and action recognition typically require deep neural networks (DNNs) with huge number of parameters. It is thereby challenging to develop a DNN video comprehension unit in resource-constrained terminal devices. In this article, we introduce a deeply tensor-compressed video comprehension neural network, called DEEPEYE, for inference on terminal devices. Instead of building a Long
-
Design Space Exploration for Ultra-Low-Energy and Secure IoT MCUs ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-05-16 Ehsan Aerabi; Milad Bohlouli; Mohammad Hasan Ahmadi Livany; Mahdi Fazeli; Athanasios Papadimitriou; David Hely
This article explores the design space of secure communication in ultra-low-energy IoT devices based on Micro-Controller Units (MCUs). It tries to identify, benchmark, and compare security-related design choices in a Commercial-Off-The-Shelf (COTS) embedded IoT system which contributes to the energy consumption. We conduct a study over a large group of software crypto algorithms: symmetric, stream
-
Montgomery Multiplication for Public Key Cryptography on MSP430X ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-05-16 Hwajeong Seo; Kyuhwang An; Hyeokdong Kwon; Zhi Hu
For traditional public key cryptography and post-quantum cryptography, such as elliptic curve cryptography and supersingular isogeny key encapsulation, modular multiplication is the most performance-critical operation among basic arithmetic of these cryptographic schemes. For this reason, the execution timing of such cryptographic schemes, which may highly determine that the service availability for
-
Reliable and Secure Design-Space-Exploration for Cyber-Physical Systems ACM Trans. Embed. Comput. Syst. (IF 1.53) Pub Date : 2020-05-16 Saurav Kumar Ghosh; Jaffer Sheriff R C; Vibhor Jain; Soumyajit Dey
Given the widespread deployment of cyber-physical systems and their safety-critical nature, reliability and security guarantees offered by such systems are of paramount importance. While the security of such systems against sensor attacks have garnered significant attention from researchers in recent times, improving the reliability of a control software implementation against transient environmental