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The articles in this special section focus on quantum computing. Quantum computers show great potential for enabling efficient solutions to a variety of important problems, where classical computers suffer from excessive time and/or space complexity. This rich set of problems spanning cryptography and optimization, to name a few, goes far beyond efficient simulation of quantum mechanics, which gave

Quantum computers are domain-specific accelerators that can solve commercially important problems that are beyond the capability of conventional computers. Quantum computing is at an inflection point where small systems with a few dozen qubits have been demonstrated and the number of qubits is expected to increase to several hundred over the coming years. However, the qubit quality is likely to remain

Quantum computing systems are developing rapidly as powerful solvers for a variety of real-world calculations. Traditionally, many of these same applications are solved using conventional high-performance computing (HPC) systems, which have progressed sharply through decades of hardware and software improvements. Here, we present a perspective on the motivations and challenges of pairing quantum computing

Given the impeding timeline of developing good quality quantum processing units, it is the moment to rethink the approach to advance quantum computing research. Rather than waiting for quantum hardware technologies to mature, we need to start assessing in tandem the impact of the occurrence of quantum computing in various scientific fields. However, to this purpose, we need to use a complementary but

Despite promising proof of concept demonstrations, currently available quantum hardware suffers from fundamental scalability limitations. The field is relatively new and it is imperative to consider emerging technologies in the space and evaluate their unique tradeoff spaces to determine how to best close the gap between current devices and target applications. Here, we explore three recent developments

This work presents I-DVFS: a novel approach to perform instantaneously the frequency switch during dynamic voltage frequency scaling (DVFS). The I-DVFS, unlike legacy DVFS, does not require halting an IPs execution to perform a DVFS transition, and thus, the performance overhead of DVFS is both reduced and more deterministic. Such attributes enable the more frequent use of DVFS and, thus, improve an

In this article, we present a system to collectively optimize efficiency in a very large scale deployment of GPU servers for machine learning workloads at Facebook. Our system 1) measures and stores system-wide efficiency metrics for every executed workflow; 2) aggregates data from across the execution stack to identify optimization opportunities that maximize fleet-wide efficiency improvements; 3)

Microsoft’s Pluton is dedicated silicon that aims to strengthen the security and integrity of PCs; it is derived from the Xbox One video game console SoC which was designed in partnership between Microsoft and AMD. Pluton implements and extends the functionality of the Trusted Computing Group’s (TCG) Trusted Platform Module 2.0, protects keys as they move around the SoC using dedicated silicon referred

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High fidelity operation of a quantum system requires precise tuning of control parameters. Calibration of a quantum system is often achieved by running complex series of dependent experiments and a full system calibration can require tens of calibration experiments to complete. Optimal control parameters drift over time, and components of experimental quantum systems are susceptible to failure. Hence

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The articles in this special sectoin focus on cutting-edge research on topics that relate to field programmable gate arrays (FPGA) in computing.

As applications move to the edge, efficiency in computing power and power/energy consumption is required. Heterogeneous computing promises to meet these requirements through application-specific hardware accelerators. Runtime adaptivity might be of paramount importance to realize the potential of hardware specialization, but further study is required on workload retargeting and offloading to reconfigurable

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Phylogenetics study the evolutionary history of organisms using an iterative process of creating and evaluating phylogenetic trees. This process is very computationally intensive; constructing a large phylogenetic tree requires hundreds to thousands of CPU hours. In this article, we describe an FPGA-based system that can be deployed on AWS EC2 F1 cloud instances to accelerate phylogenetic analyses

Low-precision techniques can effectively reduce the computational complexity and bandwidth requirements of a convolutional neural network (CNN) inference, but may lead to significant accuracy degradation. Mixed-low-precision techniques provide a superior approach for CNN inference since it can take the advantages of low precision while maintaining accuracy. In this article, we propose a high-performance

Modern data-intensive applications demand high computational capabilities with strict power constraints. Unfortunately, such applications suffer from a significant waste of both execution cycles and energy in current computing systems due to the costly data movement between the computation units and the memory units. Genome analysis and weather prediction are two examples of such applications. Recent

In the past decades, field-programmable gate arrays (FPGAs) have demonstrated an interesting physical platform to facilitate quantum information processing, particularly in the emergence of domain-specific hardware accelerators for quantum computing emulation and quantum key distillation. While conventional general-purpose hardware platforms have been used for quantum information processing, FPGAs

Given the complexity of modern systems-on-chip, hardware-assisted verification is an integral part of the chip-design process. However, chip designers often need to choose between richly featured but expensive emulation platforms or faster, cheaper, but less debuggable FPGA prototyping solutions. FireSim, an open-source, FPGA-accelerated hardware emulation platform hosted in the public cloud, attempts

Reports on recent patents for leading computer architecture companies. One way to reveal what technologies or areas companies are investing their research and development resources is to analyze their recently issued patents. Toward that end, this article examines patents issued to the companies that have the most issued patents in the “Electric digital data processing” subcategory in the first quarter

AMD’s recently released EPYC 7003 series CPUs (codename Milan) deliver performance and power efficiency improvements over its previous generation of data center CPUs (codename Rome). Various architectural improvements were made such as an uplift from the Zen 2 core to the Zen 3 core, unifying the L3 cache, and adding security features. Relative to the competition, AMD’s latest data center CPUs are

Prospective authors are requested to submit new, unpublished manuscripts for inclusion in the upcoming event described in this call for papers.

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The shortage of integrated circuits first became visible in early 2021s. It first affected the assembly of new cars, and then, it began to appear in gaming platforms, displays, and large-screen televisions. Other gadgets could be affected soon. The most visible economic facts appear to be simple. In the short run, many uses fight for the same last bits of fixed supply. The long run is equally simple:

Prospective authors are requested to submit new, unpublished manuscripts for inclusion in the upcoming event described in this call for papers.

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Codesign has been an integral part of computer architecture since the very first systems were brought online. From the early days of the field until now, end-user applications inevitably shape the design and capabilities of subsequent generations of hardware. Likewise, the characteristics and capabilities of new computational hardware and systems often impact the algorithms and software that run on

Despite its tremendous potential, it is still unclear how quantum computing will scale to satisfy the requirements of its most powerful applications. Among other issues, there are hard limits to the number of qubits that can be integrated into a single chip. Multicore architectures are a firm candidate for unlocking the scalability of quantum processors. Nonetheless, the vulnerability and complexity

Distributed systems have been widely adopted for deep neural networks model training. However, the scalability of distributed training systems is largely bounded by the communication cost. We design a highly efficient collective communication library, namely Alibaba Collective Communication Library (ACCL), to build distributed training systems with linear scalability. ACCL provides optimized algorithms

Kunpeng 920 is the second generation server processor designed by HiSilicon based on ARM architecture. Kunpeng 920 is able to achieve cost efficiency for various workloads through using a variety of chiplets and hybrid process technologies. The unique recomposition(s) of these flexible chipsets allows new designs to be created. The Kunpeng series processors combine technology innovations from various

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Reports on the top articles for 2020 from IEEE Micro.

Every year, IEEE Micro selects some of the most notable articles published in the previous year's computer architecture conferences to highlight in this Special Issue. In early 2021, the selection committee chose 12 articles to appear as “Top Picks” and an additional 12 deserving an “Honorable Mention” from among the 2020 conferences.

The superconductor single-flux-quantum (SFQ) logic family has been recognized as a promising solution for the post-Moore era, thanks to the ultrafast and low-power switching characteristics of superconductor devices. Researchers have made tremendous efforts in various aspects, especially in device and circuit design. However, there has been little progress in designing a convincing SFQ-based architectural

We offer the first security analysis of cache compression, a promising architectural technique that is likely to appear in future mainstream processors. We find that cache compression has novel security implications because the compressibility of a cache line reveals information about its contents. Compressed caches introduce a new side channel that is especially insidious, as simply storing data transmits

Modern web services run across hundreds of thousands of servers in a data center, i.e., at hyperscale. With the end of Moore’s Law and Dennard scaling, successive server generations running these web services exhibit diminishing performance returns, resulting in architects adopting hardware customization. An important question arises: Which web service software operations are worth building custom

This article presents a framework, Genesis (genome analysis), to efficiently and flexibly accelerate generic data manipulation operations that have become performance bottlenecks in the genomic data processing pipeline utilizing FPGAs-as-a-service. Genesis conceptualizes genomic data as a very large relational database and uses extended SQL as a domain-specific language to construct data manipulation

Cloud computing has begun a transformation from using virtual machines to using containers. Containers are attractive because of their “build once, run anywhere” computing model and their minimal performance overhead. Cloud providers leverage the lean nature of containers to run hundreds of them or more on a few cores. Furthermore, containers enable the serverless paradigm, which involves the creation

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Cryogenic computing can achieve high performance and power efficiency by dramatically reducing the device’s leakage power and wire resistance at low temperatures. Recent advances in cryogenic computing focus on developing cryogenic-optimal cache and memory devices to overcome memory capacity, latency, and power walls. However, little research has been conducted to develop a cryogenic-optimal core architecture

Fault-tolerant quantum computing is required to execute many of the most promising quantum applications. In recent years, numerous error correcting codes, such as the surface code, have emerged which are well suited for current and future limited connectivity 2-D devices. We find quantum memory, particularly resonant cavities with transmon qubits arranged in a 2.5-D architecture, can efficiently implement

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The modern technology supply chain is highly complex. Throughout the various stages of design, manufacture, assembly, transport, and operation, a compute device is subject to tampering (malicious or otherwise). This exposes end users and consumers of compute devices to a variety of risks at varying levels of impact. Two potential technology solutions, which aim to provide transparency and insight into

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We are living through a monumental change in work. Experiments during the pandemic turned into regular operations, and have had a profound impact on perceptions of the viability of remote work. I do not lightly use the word “profound.” The trend reverses more than two centuries of separating the location of work and residences. That separation has deep roots, and reflects something fundamental about

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