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Origin of high dielectric performance in fine grain-sized CaCu3Ti4O12 materials
Journal of the European Ceramic Society ( IF 5.7 ) Pub Date : 2019-12-24 , DOI: 10.1016/j.jeurceramsoc.2019.12.042
He Lin , Wentao Xu , Haitao Zhang , Chen Chen , Youfu Zhou , Zhiguo Yi

We report on high dielectric constant (8.3 × 103, 104 Hz), low dielectric loss (0.029, 104 Hz) as well as fine grain size (∼840 nm) achieved in pure CaCu3Ti4O12 (CCTO) ceramics through a combination of sol–gel method, spark plasma sintering and annealing process. By adjusting the sintering temperature and annealing conditions, the composition variations, valence states and microstructures of CCTO ceramics are systematically studied, which provide direct clues in understanding the origin of their excellent dielectric response. Through the studies on the dielectric, impedance, modulus and conductivity properties of CCTO ceramics, a modified brick-layer model based on two interfacial polarizations originating from sub-grain boundary and grain boundary barriers is proposed to explain their dielectric behaviors. The high dielectric constant of CCTO ceramics is mainly dominated by the sub-grain contribution; and the reduced dielectric loss is attributed to the decreases of electrical conductivity and relaxation loss.



中文翻译:

细晶粒尺寸的CaCu 3 Ti 4 O 12材料具有高介电性能的起源

我们对高介电常数(8.3×10报告3,10 4 赫兹),低介电损耗(0.029,10 4 赫兹),以及在纯CaCu实现细晶粒尺寸(~840纳米)3的Ti 4 Ô 12(CCTO)陶瓷通过溶胶-凝胶法,火花等离子体烧结和退火工艺相结合。通过调节烧结温度和退火条件,系统地研究了CCTO陶瓷的组成变化,价态和微观结构,为了解其优异的介电响应的起源提供了直接的线索。通过对CCTO陶瓷的介电,阻抗,模量和导电性能的研究,提出了一种基于亚晶界和晶界势垒的两种界面极化的改进砖层模型,以解释其介电行为。CCTO陶瓷的高介电常数主要受亚晶粒贡献的支配。

更新日期:2019-12-24
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