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Atomic layer deposition of high-k dielectrics on III–V semiconductor surfaces
Progress in Crystal Growth and Characterization of Materials ( IF 5.1 ) Pub Date : 2016-12-01 , DOI: 10.1016/j.pcrysgrow.2016.11.001
Theodosia Gougousi

Abstract The goal of this article is to provide an overview of the state of knowledge regarding the Atomic Layer Deposition (ALD) of metal oxides on III–V semiconductor surfaces. An introduction to ALD, the band structure, various defects present on the III–V surface and how they relate to Fermi level pinning are discussed. Surface passivation approaches are examined in detail in conjunction with experimental and computational results. The “interface clean-up” reaction that leads to the formation of a sharp gate oxide/semiconductor interface is related to the surface chemistry and the transport of the surface oxides through the growing dielectric film. Finally, the deposition of metal oxides on semiconductors is discussed in the context of interface quality and some examples of devices using III–V channels and ALD metal oxides are given.

中文翻译:

III-V半导体表面高k电介质的原子层沉积

摘要 本文的目的是概述有关 III-V 族半导体表面金属氧化物原子层沉积 (ALD) 的知识状态。讨论了 ALD 的介绍、能带结构、III-V 族表面上存在的各种缺陷以及它们与费米能级钉扎的关系。结合实验和计算结果详细研究了表面钝化方法。导致形成尖锐栅极氧化物/半导体界面的“界面清理”反应与表面化学和表面氧化物通过不断增长的介电膜的传输有关。最后,在界面质量的背景下讨论了金属氧化物在半导体上的沉积,并给出了一些使用 III-V 族通道和 ALD 金属氧化物的器件示例。
更新日期:2016-12-01
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