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Investigation of Off-State Stress Induced Degradation of SiC MOSFETs Under Short-Circuit Condition
IEEE Transactions on Industrial Electronics ( IF 7.7 ) Pub Date : 2022-07-13 , DOI: 10.1109/tie.2022.3189071 Jianlong Kang 1 , Qing Liu 2 , Haoze Luo 3 , Hu Cao 4 , Zi-Hui Zhang 5 , Zhen Xin 5
IEEE Transactions on Industrial Electronics ( IF 7.7 ) Pub Date : 2022-07-13 , DOI: 10.1109/tie.2022.3189071 Jianlong Kang 1 , Qing Liu 2 , Haoze Luo 3 , Hu Cao 4 , Zi-Hui Zhang 5 , Zhen Xin 5
Affiliation
Investigation of silicon carbide (SiC) mosfet
s short-circuit (SC) degradation mechanism is critical to improve the overall reliability of power converters. At present, research on the SiC mosfet
s degradation mechanism mainly focuses on the on
-state phase of the SC period. While, ruggedness of SiC mosfet
s in the off
-state phase of short-circuit tests (SCTs) were neglected. In this article, SiC mosfet
s degradation mechanism in the off
-state phase of SCTs are investigated comprehensively. Specifically, distribution and magnitude of electrothermal stress of devices under test in the off
-state phase of SCTs are analyzed by technology computer aided design (TCAD) simulation, which reveals two important phenomena: 1) the device will suffer from long-term high temperature and high electric field stress in the off
-state phase when negative turn-
off gate voltage (
V
gs-off
) is applied; 2) high hole current in the channel region will last for several microseconds after the device is turned off
. The observed SiC mosfet
s degradation in the off
-state phase of SCTs is then proved by experiments, through which, the excessively low V
gs-off can reduce the SC capability of SiC mosfet
s is concluded. Moreover, the degradation results of static parameters of SiC mosfet
s are presented and the degradation mechanism is analyzed in detail.
中文翻译:
短路条件下 SiC MOSFET 的断态应力退化研究
碳化硅(SiC)的研究mosfet 的短路 (SC) 退化机制对于提高电源转换器的整体可靠性至关重要。目前,SiC 的研究mosfet 的退化机制主要集中在SC 期间的导通阶段。同时,SiC 的坚固性mosfet s 在忽略了短路测试 (SCT) 的断态阶段。在这篇文章中,碳化硅mosfet 的退化机制全面研究了 SCT 的非状态阶段。具体来说,被测器件的电热应力分布和大小通过技术计算机辅助设计(TCAD)仿真分析SCTs的断态阶段,揭示了两个重要现象:1)器件在工作过程中会遭受长期的高温和高电场应力。断态阶段,当负转
关断栅极电压(
V
gs- off
)被应用;2)器件开启后沟道区的高空穴电流会持续几微秒离开 。观察到的碳化硅mosfet 的退化然后通过实验证明了 SCT 的关态阶段,通过该实验,过低的V
gs- off会降低 SiC 的 SC 能力mosfet s 结束。此外,SiC静态参数的退化结果介绍了 mosfet 并详细分析了退化机制。
更新日期:2022-07-13
中文翻译:
短路条件下 SiC MOSFET 的断态应力退化研究
碳化硅(SiC)的研究