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Read Optimization Enables Ultralow Resistance Drift for Phase Change Memory
IEEE Transactions on Electron Devices ( IF 3.1 ) Pub Date : 2022-09-01 , DOI: 10.1109/ted.2022.3200347
Cheng Chen 1 , Xi Li 1 , Chenchen Xie 1 , Houpeng Chen 1 , Siqiu Xu 1 , Zhitang Song 1
Affiliation  

Phase change memory (PCM) has been proven to have unique advantages in embedded applications, mass storage, and in-memory computing areas. To further improve the reliability of data reading for PCM, numerous studies have shown that the spontaneous structural relaxation of the amorphous phase material causes resistance drift and finally affects the reliability. By studying the effect of different read voltages on the resistance stability of PCM cells with various electrode sizes, a read optimization method on low drift property has been presented in this article. The average drift coefficient decreased by one order of magnitude to 0.0034 and, thus, promising higher data reliability of data reading.

中文翻译:

读取优化为相变存储器实现超低电阻漂移

相变存储器 (PCM) 已被证明在嵌入式应用、大容量存储和内存计算领域具有独特的优势。为了进一步提高PCM数据读取的可靠性,大量研究表明,非晶相材料的自发结构弛豫会导致电阻漂移并最终影响可靠性。通过研究不同读取电压对不同电极尺寸PCM单元电阻稳定性的影响,本文提出了一种读取低漂移特性的优化方法。平均漂移系数降低了一个数量级,达到 0.0034,从而保证了数据读取的更高数据可靠性。
更新日期:2022-09-01
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