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A Sub-1-V 8.5-ppm/°C Sampled Bandgap Voltage Reference
IEEE Transactions on Circuits and Systems II: Express Briefs ( IF 4.4 ) Pub Date : 2022-06-21 , DOI: 10.1109/tcsii.2022.3184816
Rakesh Kumar Palani 1 , Srikar Bhagavatula 2 , Denny K. Yuen 2
Affiliation  

This brief proposes a novel sub-1V discrete-time CMOS bandgap reference circuit where a constant voltage is produced by summation of a CTAT and a PTAT voltage that are sampled onto a capacitor. By sampling the voltages onto a capacitor, we eliminate the need for an opamp in the bandgap core, which tends to be the dominant source of noise and offset concerns in low voltage bandgap designs in scaled technologies. A prototype was designed and fabricated in 28nm TSMC HPC+ technology with a nominal output voltage of 108mV. It demonstrates a temperature coefficient of 8.5ppm/°C between −40°C and 125°C, and occupies an area of 0.0075mm2 while consuming $11.6\mu \text{W}$ of power.

中文翻译:

低于 1V 的 8.5ppm/°C 采样带隙电压基准

本简报提出了一种新颖的低于 1V 离散时间 CMOS 带隙参考电路,其中恒定电压是通过对电容器采样的 CTAT 和 PTAT 电压的总和产生的。通过对电容器上的电压进行采样,我们消除了带隙内核中对运算放大器的需求,这往往是缩放技术中低压带隙设计中噪声和偏移问题的主要来源。原型采用 28nm TSMC HPC+ 技术设计和制造,标称输出电压为 108mV。它在 -40°C 和 125°C 之间表现出 8.5ppm/°C 的温度系数,占用的面积为 0.0075mm2,同时消耗 $11.6\mu \text{W}$的权力。
更新日期:2022-06-21
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