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A 2.71 fJ/conversion-step 10-bit 50 MSPS split-capacitor array SAR ADC for FOG systems
International Journal of Electronics ( IF 1.3 ) Pub Date : 2022-09-22 , DOI: 10.1080/00207217.2022.2118861
Chua-Chin Wang, Ralph Gerard B. Sangalang, Meng-Jie Wu, Tzung-Je Lee, Yi-Jen Chiu, Lean Karlo S. Tolentino, Oliver Lexter July A. Jose

This investigation demonstrates a 10-bit SAR-ADC with low power dissipation per conversion step at 50 MS/s sampling rate. The proposed ADC is featured with the split-capacitance array by using unit...

中文翻译:

适用于 FOG 系统的 2.71 fJ/转换步长 10 位 50 MSPS 分离电容器阵列 SAR ADC

这项研究展示了 10 位 SAR-ADC 在 50 MS/s 采样率下每个转换步骤的功耗都很低。所提出的 ADC 具有分体电容阵列的特点,使用单元...
更新日期:2022-09-22
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