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Affordable and Comprehensive Testing of 3-D Stacked Die Devices
IEEE Design & Test ( IF 2 ) Pub Date : 2022-07-14 , DOI: 10.1109/mdat.2022.3191016 Jean-Francois Cote , Jeff Fan , Sean Shen , Givargis Danialy , Marcin Lipinski , Michael Garbers , Wu Yang , Martin Keim , Andreas Glowatz , Joe Reynick , Ayush Patel , Joanna Michna
Editor’s notes: The tooling support from EDA vendors is critical for the embedding of various IEEE standards into the volume production of 3-D chips. In this article, scalable Design-for-Test solutions compatible with IEEE standards are discussed from the industrial EDA perspective. —Hailong Jiao, Peking University
更新日期：2022-07-14
IEEE Design & Test ( IF 2 ) Pub Date : 2022-07-14 , DOI: 10.1109/mdat.2022.3191016 Jean-Francois Cote , Jeff Fan , Sean Shen , Givargis Danialy , Marcin Lipinski , Michael Garbers , Wu Yang , Martin Keim , Andreas Glowatz , Joe Reynick , Ayush Patel , Joanna Michna
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