As the scaling of CMOS-based technology displays signs of an imminent saturation, employing the second intrinsic electron characteristics – the electron spin – is attractive to further boost the performance of integrated circuits and to introduce new computational paradigms. A single electron spin forms a qubit and is suitable for quantum applications. In digital applications, the spin promises to offer an additional functionality to charge-based CMOS circuitry. Recently, spin injection into a semiconductor and spin manipulation by the gate voltage were successfully demonstrated providing a vision that devices using spin in addition to charge may appear in significant numbers on the market in the non-distant future.

On the memory side, the nonvolatile CMOS-compatible spin-transfer torque (STT) and the spin–orbit torque (SOT) magnetoresistive random access memories (MRAMs) are already competing with flash memory and SRAM for embedded applications. A combination of nonvolatile elements with CMOS circuitry allows to shift the data processing into the nonvolatile segment, paving the way for a novel low power computational paradigm based on logic-in-memory and in-memory computing architectures.

To model MRAM, we innovatively extend the spin and charge transport equations to multi-layered structures consisting of normal and ferromagnetic metal layers separated by tunnel barriers. We validate our approach by modeling the magnetization dynamics in ultra-scaled MRAM cells.

随着基于 CMOS 的技术的缩放显示出即将饱和的迹象，采用第二个固有电子特性——电子自旋——对于进一步提高集成电路的性能和引入新的计算范式具有吸引力。单个电子自旋形成一个量子比特，适用于量子应用。在数字应用中，自旋有望为基于电荷的 CMOS 电路提供额外的功能。最近，自旋注入半导体和栅极电压的自旋操纵已被成功证明，提供了一个愿景，即在不远的将来，除了电荷之外还使用自旋的器件可能会大量出现在市场上。

在存储器方面，非易失性 CMOS 兼容的自旋转移矩 (STT) 和自旋轨道扭矩 (SOT) 磁阻随机存取存储器 (MRAM) 已经在嵌入式应用中与闪存和 SRAM 竞争。非易失性元件与 CMOS 电路的组合允许将数据处理转移到非易失性部分，为基于内存逻辑和内存计算架构的新型低功耗计算范例铺平了道路。

为了模拟 MRAM，我们创新地将自旋和电荷传输方程扩展到由隧道势垒隔开的正常和铁磁金属层组成的多层结构。我们通过对超大规模 MRAM 单元中的磁化动力学进行建模来验证我们的方法。