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Broadband plasmonic half-subtractor and digital demultiplexer in pure parallel connections
Nanophotonics ( IF 7.5 ) Pub Date : 2022-07-13 , DOI: 10.1515/nanoph-2022-0267
Pei-Yuan Wu, Yun-Chorng Chang, Chen-Bin Huang

Nanophotonic arithmetic circuits requiring cascaded Boolean operations are difficult to implement due to loss and footprint issues. In this work, we experimentally demonstrate plasmonic half-subtractor and demultiplexer circuits based on transmission-lines. Empowered by the unique polarization selectivity in the surface plasmon modal behaviors, both circuits are realized without cascading. The operations of the half-subtractor and demultiplexer can be performed using a single laser beam with three predefined linear polarizations. All of our experiments are performed using a 56 fs laser providing greater than 12.5 THz optical bandwidth. The experimental results are found in excellent quantitative accordance with numerical calculations. The photonic integrated circuit framework proposed in this work could pave the future avenue towards the realization of highly compact, multi-functional, on-chip integrated photonic processors.

中文翻译:

纯并联连接的宽带等离子体半减法器和数字解复用器

由于损耗和占用空间问题,需要级联布尔运算的纳米光子算术电路难以实现。在这项工作中,我们通过实验证明了基于传输线的等离子体半减法器和多路分解器电路。由于表面等离子体模态行为中独特的极化选择性,两个电路均无需级联即可实现。半减法器和解复用器的操作可以使用具有三个预定义线性偏振的单个激光束来执行。我们所有的实验都是使用提供大于 12.5 THz 光带宽的 56 fs 激光器进行的。根据数值计算,发现实验结果非常定量。
更新日期:2022-07-13
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