In this paper, we present a class of hybrid coupled serially concatenated codes (HC-SCC), in which coupling is achieved by re-encoding partial outputs from both the outer and the inner encoders. Firstly, we derive the exact density evolution (DE) equations over the binary erasure channels (BECs) for the HC-SCCs, which can be used to analyze the impact of the coupling ratios and the coupling memories on the performances of the HC-SCCs. Secondly, we present a genie-aided lower bound for the proposed HC-SCCs to estimate their error-floors. Thirdly, we use the DE equations to design randomly punctured HC-SCCs, including rate-compatible HC-SCCs. The analytical and the numerical results show that: 1) for comparable coupling memories, the iterative decoding thresholds of the proposed HC-SCC ensembles are better than those of the recently introduced spatially coupled serially concatenated code (SC-SCC) ensembles and the partially parity-coupled turbo code (PPC-TC) ensembles; 2) with outer coupling memory five and inner coupling memory five, the iterative decoding thresholds of the rate-compatible HC-SCCs over the BECs are 0.0003 away from the corresponding channel capacities for a wide range of coding rates; 3) simulation results over the additive white Gaussian noise (AWGN) channels and the BECs are provided to confirm the performance advantages of the HC-SCCs. Particularly, the simulation results show that the HC-SCCs admit lower error-floor than the SC-SCCs and the rate-compatible HC-SCCs perform better than the PPC-TCs, which are consistent with the results of DE analysis.

中文翻译：

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混合耦合串行级联码

在本文中，我们提出了一类混合耦合串行级联码（HC-SCC），其中耦合是通过重新编码外部和内部编码器的部分输出来实现的。首先，我们推导了 HC-SCC 二进制擦除通道 (BEC) 上的精确密度演化 (DE) 方程，可用于分析耦合比和耦合存储器对 HC-SCC 性能的影响. 其次，我们为提议的 HC-SCC 提供了一个精灵辅助的下限，以估计它们的错误底限。第三，我们使用 DE 方程设计随机穿孔的 HC-SCC，包括速率兼容的 HC-SCC。分析和数值结果表明：1）对于可比较的耦合存储器，所提出的 HC-SCC 集成的迭代解码阈值优于最近引入的空间耦合串行级联码 (SC-SCC) 集成和部分奇偶耦合 turbo 码 (PPC-TC) 集成的迭代解码阈值；2)在外耦合存储器5和内耦合存储器5的情况下，在BEC上速率兼容的HC-SCC的迭代解码阈值在宽编码率范围内与对应的信道容量相差0.0003；3) 提供了加性高斯白噪声 (AWGN) 通道和 BEC 的仿真结果，以确认 HC-SCC 的性能优势。特别是，模拟结果表明，HC-SCCs 比 SC-SCCs 具有更低的错误底限，并且速率兼容的 HC-SCCs 比 PPC-TCs 表现更好，这与 DE 分析的结果一致。