This letter presents a differential two-stage cascode $D$ -band low-noise amplifier (LNA) using IHP’s $0.13~\mu \text{m}$ SiGe BiCMOS technology. Both gain-peaking and noise-reduction techniques are applied, and a proper interstage matching for an improved linearity is implemented and thereby, the best FoM is achieved among the reported silicon-based $D$ -band LNAs up to date. The small-signal gain is 20 dB at 140 GHz with a 3-dB bandwidth of 31 GHz. The LNA exhibits a simulated noise figure of 5.9 dB and an input-referred 1-dB compression point of −19.7 dBm, which demonstrates a leading-edge performance. The total occupied chip area is 0.4 mm² including the pads, and the LNA core occupies only 0.1 mm². The proposed differential LNA consumes a total of 31.8 mW from a 2-V supply.

中文翻译：

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采用 0.13 μm SiGe 封装的差分 D 波段低噪声放大器

这封信提出了一个差分两级级联 $D$使用 IHP 的波段低噪声放大器 (LNA) $0.13~\mu \text{m}$SiGe BiCMOS 技术。应用了增益峰值和降噪技术，并实施了适当的级间匹配以改善线性度，从而在报告的硅基中实现了最佳的 FoM $D$最新的波段 LNA。小信号增益在 140 GHz 时为 20 dB，3-dB 带宽为 31 GHz。LNA 的模拟噪声系数为 5.9 dB，输入参考的 1-dB 压缩点为 -19.7 dBm，显示出领先的性能。包括焊盘在内的总占用芯片面积为0.4 mm ²，LNA内核仅占用0.1 mm ²。提议的差分 LNA 在 2V 电源下总共消耗 31.8 mW。