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FAMCroNA: Fault Analysis in Memristive Crossbars for Neuromorphic Applications
Journal of Electronic Testing ( IF 0.9 ) Pub Date : 2022-05-13 , DOI: 10.1007/s10836-022-06001-2
Dev Narayan Yadav , Phrangboklang Lyngton Thangkhiew , Kamalika Datta , Sandip Chakraborty , Rolf Drechsler , Indranil Sengupta

Resistive memories have drawn the attention of researchers due to their low power and single-cycle computation of vector-matrix multiplication (VMM), which is the main operation performed in neural networks. For performing VMM, one of the most desirable architectures is the memristor crossbar that has several advantages over other memory technologies, viz. in-memory computation, low power, and high density. However, faults present in the crossbar can introduce errors in the inference process during neuromorphic computations. Existing methods to handle faults using retraining and remapping incur overheads in terms of hardware, power, and delay. In this paper we explore and analyze the impact of faults on memristor-based crossbar for overall inference accuracy. We have observed that the accuracy is not significantly affected in the presence of a limited number of faults. Also, the inference quality and effect of faults depend on the number of neural network layers and storage resolution of memristors present in the crossbar. The introduced approach works in three phases, fault tolerance analysis, high-level fault detection, and low-level fault detection. In the first phase, we analyze the fault tolerance capability of the crossbar, which identifies how many faults can be tolerated for a given application. In the second phase, we estimate the percentage of faults, and if it is below a threshold the third phase can be skipped. In the third phase, an efficient method to determine the exact location of the faults is used. The proposed method is capable of performing parallel operations, thus requiring fewer read/write steps as compared to existing works. The proposed approach requires O(N) read/write operations as compared to \(O(N^2)\) operations required in existing works.



中文翻译:

FAMCrNA:用于神经形态应用的忆阻横杆故障分析

电阻式存储器因其低功耗和单周期计算向量矩阵乘法(VMM)而引起了研究人员的关注,而向量矩阵乘法是神经网络中执行的主要操作。对于执行 VMM,最理想的架构之一是忆阻器交叉开关,它与其他存储器技术相比具有多个优势,即。内存计算,低功耗和高密度。但是,交叉开关中存在的故障会在神经形态计算期间的推理过程中引入错误。使用重新训练和重新映射来处理故障的现有方法会在硬件、功率和延迟方面产生开销。在本文中,我们探索和分析了故障对基于忆阻器的交叉开关对整体推理准确性的影响。我们观察到,在存在有限数量的故障时,准确性不会受到显着影响。此外,故障的推理质量和影响取决于交叉开关中存在的神经网络层数和忆阻器的存储分辨率。引入的方法分三个阶段工作,容错分析、高级故障检测和低级故障检测。在第一阶段,我们分析交叉开关的容错能力,确定给定应用程序可以容忍多少故障。在第二阶段,我们估计故障的百分比,如果它低于阈值,则可以跳过第三阶段。在第三阶段,使用一种有效的方法来确定故障的确切位置。所提出的方法能够执行并行操作,因此与现有作品相比,需要更少的读/写步骤。建议的方法需要与现有作品中所需的\(O(N^2)\)操作相比,O ( N ) 读/写操作。

更新日期:2022-05-14
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